Semiconductor device having an element isolating oxide film and

Details Semiconductor device having an element isolating oxide film and Semiconductor device having an element isolating oxide film and

1996-02-14

1998-11-03

Chaudhuri, Olik

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including dielectric isolation means

257333, 257647, 257395, 438297, H01L 2900

Patent

active

058313230

ABSTRACT:
There are provided a semiconductor device, which includes an element isolating oxide film having a good upper flatness, and a method of manufacturing the same. Assuming that t.sub.G represents a thickness of a gate electrode layer 6, a height t.sub.U to an upper surface of a thickest portion of element isolating oxide film 4 from an upper surface of a gate insulating film 5 and an acute angle .theta.i defined between the upper surfaces of element isolating oxide film 4 and gate insulating film are set within ranges expressed by the formula of {.theta.i, t.sub.U .linevert split.0.ltoreq..theta.i.ltoreq.56.6.degree., 0.ltoreq.t.sub.U .ltoreq.0.82t.sub.G }. Thereby, an unetched portion does not remain at an etching step for patterning the gate electrode layer to be formed later. This prevents short-circuit of the gate electrode. Since the element isolating oxide film has the improved flatness, a quantity of overetching in an active region can be reduced at a step of patterning the gate electrode. This prevents shaving of the gate insulating film and the underlying substrate surface.

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Patric Deroux-Dauhphin et al., "Physical and Electrical Characterization of a SILO Isolation Structure," IEEE Transactions on Electron Devices, vol. ED-32, No. 11, Nov. 1985, pp. 2392-2398.
Hong-Hsiang Tsai et al., "An Evaluation of FUROX Isolation Technology for VLSI
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