Semiconductor device having an electrical contact and a...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

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C257S773000

Reexamination Certificate

active

06627993

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a semiconductor device, more particularly to a method for forming an electrical contact of a semiconductor device.
2. Description of the Related Art
Referring to
FIGS. 1 and 2
, a conventional semiconductor device
1
is shown to have a lower metal layer
10
, a lower dielectric layer
11
on top of the lower metal layer
10
, an upper metal layer
12
on top of the lower dielectric layer
11
, and an upper dielectric layer
13
on top of the upper metal layer
12
. The semiconductor device
1
further has a contact region
14
in the form of a cavity that extends through the upper dielectric layer
13
, the upper metal layer
12
and the lower dielectric layer
11
for access to a solder pad portion
16
of the lower metal layer
10
. A grounding trace
17
is disposed on the upper dielectric layer
13
and surrounds the contact region
14
to protect the semiconductor device
1
from static electricity. To enable electrical connection of the lower metal layer
10
with an external circuit (not shown), a contact body
15
, which is made of solid metal, is mounted in the contact cavity
14
via conventional wire-bonding techniques. It is noted that, if liquid metal is used to form the contact body
15
, short-circuiting will occur due to formation of an undesired connection between the lower and upper metal layers
10
,
12
.
It is desirable to provide an alternative contact-forming method for a semiconductor device so that manufacturing costs can be lowered in order to enhance market competitiveness.
SUMMARY OF THE INVENTION
Therefore, the main object of the present invention is to provide a semiconductor device and a method for forming an electrical contact of the semiconductor device at a relatively low cost.
According to one aspect of the invention, a semiconductor device comprises: a lower metal layer; a lower dielectric layer on top of the lower metal layer; an upper metal layer on top of the lower dielectric layer; an upper dielectric layer on top of the upper metal layer; a contact region formed as a cavity that extends through the upper dielectric layer, the upper metal layer and the lower dielectric layer for access to a solder pad portion of the lower metal layer; a dielectric lining layer that lines a peripheral cavity-confining surface of the cavity and that is transverse to a plane of the lower metal layer to isolate the upper metal layer from the lower metal layer while permitting access to the solder pad portion of the lower metal layer; and an electrical contact that fills the cavity and that enables external electrical connection with the lower metal layer.
According to another aspect of the invention, there is provided a contact-forming method for a semiconductor device having a lower metal layer, a lower dielectric layer on top of the lower metal layer, an upper metal layer on top of the lower dielectric layer, an upper dielectric layer on top of the upper metal layer, and a contact region formed as a cavity that extends through the upper dielectric layer, the upper metal layer and the lower dielectric layer for access to a solder pad portion of the lower metal layer. The contact-forming method comprises:
forming the semiconductor device with a dielectric lining layer that lines a peripheral cavity-confining surface of the cavity and that is transverse to a plane of the lower metal layer to isolate the upper metal layer from the lower metal layer while permitting access to the solder pad portion of the lower metal layer; and
filling the cavity with a liquid metal to form an electrical contact that enables external electrical connection with the lower metal layer.


REFERENCES:
patent: 4552691 (1985-11-01), Shoji et al.
patent: 5275330 (1994-01-01), Isaacs et al.
patent: 5414221 (1995-05-01), Gardner
patent: 5796591 (1998-08-01), Dalal et al.
patent: 6171944 (2001-01-01), Li et al.

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