Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Patent
1994-11-09
1996-06-11
Jackson, Jr., Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Alignment marks
437924, H01L 23544
Patent
active
055258409
ABSTRACT:
A semiconductor device has an alignment mark formed as a diffraction grating which comprises a plurality of unit markers arranged so that the period P of the diffraction grating is 8 .mu.m. The length d.sub.1 of each unit marker in the scanning direction of a laser beam is 4 .mu.m while the length L thereof in a direction perpendicular to the scanning direction is 4 .mu.m. Each unit marker comprises nine unit segments each of 0.8 .mu.m.times.0.8 .mu.m in size and arranged in an array of 3.times.3. Submicron openings constituting an unit segment has a small size for sufficiently filling the openings with deposited metal. An accurate alignment can be obtained by the alignment mark in an optical stepper for manufacturing semiconductor devices.
REFERENCES:
patent: 4893163 (1990-01-01), Rudeck
patent: 4981529 (1991-01-01), Tsujita
patent: 5405810 (1995-04-01), Mizuno et al.
S. Murakami et al., "Laser Step Alignment For A Wafer Stepper," SPIE vol. 538 Optical Microlithography IV (1985), pp. 9-15.
N. Magome et al., "Laser Alignment Signal Simulation For Analysis of Al Layers," SPIE vol. 1088 Optical/Laser Microlithography II (1989), pp. 238-247.
Guay John
Jackson, Jr. Jerome
NEC Corporation
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