Semiconductor device having active region in semiconductor layer

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

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257 75, 257369, H01L 2978, H01L 2904

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active

055280544

ABSTRACT:
Generation of new crystal defects in a monocrystalline semiconductor layer caused by heat treatment, oxidation treatment or polishing treatment is prevented in a method of manufacturing a semiconductor device of an SOI structure. Thus, unevenness in the properties of active devices formed on the monocrystalline semiconductor layers and their malfunctions can be restrained. A non-monocrystalline semiconductor layer formed on an insulator layer is melted to have a prescribed temperature distribution, and monocrystallized. The region of the obtained monocrystalline semiconductor layer corresponding to a high temperature portion in melting is selectively removed before the monocrystalline semiconductor layer is subjected to heat-treatment. Active devices are formed on the resultant island shaped monocrystalline semiconductor layers. The surface of the island shaped monocrystalline semiconductor layer may be polished to be planarized before the formation of the active device.

REFERENCES:
patent: 4514895 (1985-05-01), Nishimura
patent: 4543133 (1985-09-01), Mukai
patent: 4822752 (1989-04-01), Sugahara et al.
patent: 5028564 (1991-07-01), Chang et al.
patent: 5039621 (1991-08-01), Pollack
Sugahara et al. "Orientation Control of SOI Film By Laser Recrystallization" 18th (1986 International) Conference Solid State Devices, Tokyo, 1986, pp. 65-568.
Sugahara et al. "Orientation Control of the Silicon Film on Insulator by Laser Recrystallization" J. Appl. Physics, vol. 62 (15 Nov. 1987) pp. 4178-4181.
JP-OS 3-96216 (A) in: Patents Abstracts of Japan, E-1090, vol. 15, No. 280, Jul. 16, 1991.
"Evaluation and Control of Grain Boundaries in Laser-Recrystallized Polysilicon Islands for Device Fabrication" by Tadashi Nishimura et al., Proceedings of the 14th Conference on Solid State Devices, Tokyo, 1982; Japanese Journal of Applied Physics, vol. 22 (1983) Supplement 22-1, pp. 217-221.
"Effect of Grain Boundaries on the I-V Characteristic of P-Channel MOSFET/SOI" by T. Nishimura et al., Extended Abstracts of the 17th Conference on Solid State Devices and Materials, Tokyo, 985, pp. 147-150.
"SOI/SOI/Bulk-Si Triple-Level Structure for Three-Dimensional Devices", by K. Sugahara et al., IEEE Electron Device Letters, vol. EDL-7, No. 3, Mar. 1986, pp. 193-195.
Electronics. DE 184 A 1985: Electronics Week, vol. 56, No. 9, May 1983, New Yor, US, pp. 86-86, R. T. Gallagher, "Silicon On Insulator Attains High Yield By Boundary Control".
Microelectronic Engineering., vol. 8, No. 3-4, Dec. 1988, Amsterdam NL, pp. 273-291, E. I. Givcargizov et al., "Artificial Epitaxy (Graphoepitaxy) As An Approach To The Formation Of SOI", p. 273, line 1-p. 275, line 3; FIG. 2,12.

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