Patent
1990-11-14
1991-07-23
Carroll, J.
357 6, 357 235, 357 2315, H01L 4902, H01L 2968, H01L 2978, H01L 2934
Patent
active
050347985
ABSTRACT:
A semiconductor device is disclosed, which comprises source and drain regions formed in a spaced-apart relation to each other on an isolated semiconductor substrate surface, a first conductive layer formed over a channel region between the source and drain regions via a gate insulating film and serving as a floating gate electrode, a two-layer insulating layer formed on the first conductive layer and consisting of a silicon oxynitride film and a silicon oxide film, and a second conductive layer formed on the two-layer insulating layer and serving as a control gate electrode. In the semiconductor device of this structure, the silicon oxynitride film traps fewer electrons, and electrons are infrequently trapped at the time of data erasing, so that data-erasing characteristics can be improved. Further, since fewer electrons are trapped, unlike the prior art insulating layer utilizing a silicon nitride film, there is no need for providing any silicon oxide film on each side, and with the two-layer structure consiting of the silicon oxynitride film and a silicon oxide film it is possible to obtain sufficient insulation and film thickness reduction.
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T. C. Penn, "New Methods of Processing Silicon Series", Science, vol. 208 (May 1980) pp. 923-926.
Carroll J.
Kabushiki Kaisha Toshiba
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