Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1997-06-13
1999-01-12
Fourson, George
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438701, 438704, 438978, H01L 2176
Patent
active
058588590
ABSTRACT:
A device-isolating trench having a taper at its upper portion is formed in a silicon semiconductor substrate. Then, a silicon oxide film is formed on the inner wall of the trench and the surface of the semiconductor substrate near the trench by an oxidizing method, and polycrystalline silicon is buried in the trench.
REFERENCES:
patent: 4486266 (1984-12-01), Yamaguchi
patent: 4636281 (1987-01-01), Buigez et al.
patent: 4649288 (1987-03-01), Price et al.
patent: 4653090 (1987-03-01), Tamaki et al.
patent: 4729815 (1988-03-01), Leung
patent: 4839306 (1989-06-01), Wakamatsa
patent: 4855017 (1989-08-01), Douglas
patent: 4857477 (1989-08-01), Kanamori
patent: 4866004 (1989-09-01), Fukushima
patent: 4876214 (1989-10-01), Yamaguchi et al.
patent: 4882291 (1989-11-01), Jeuch
patent: 4916086 (1990-04-01), Takahashi et al.
patent: 4931409 (1990-06-01), Nakajima et al.
patent: 5061653 (1991-10-01), Teng
patent: 5100822 (1992-03-01), Mitani
patent: 5106770 (1992-04-01), Bulay
patent: 5217919 (1993-06-01), Gaul et al.
patent: 5258332 (1993-11-01), Hurioka et al.
patent: 5506168 (1996-04-01), Morita et al.
patent: 5683908 (1997-11-01), Miyashita et al.
Wolf, S. et al., "Silicon Processing for the ULSI Era," Processing Technolgy, vol. 1, 1989 Lattice Press, pp. 531-532.
Y. Tamaki et al., "Evaluation of Dislocation Generation in U-Grove Isolation," Journal of the Electrochemical Society, vol. 135, No. 3, Mar. 1988, pp. 726-730.
A. Hayasaka et al., "U-Grove Isilation Technique for High Speed Bipolar VLSI's," IEDM, 1982.
L.O. Wilson, "Oxidation of Curved Silicon Surfaces," Journal of the Electrochemical Society, vol. 134, No. 2, pp. 481-490, Feb. 1987.
K. Imai et al., "Decrease in Trenched Surface Oxide Leakage Currents By Rounding Off Oxidation," Japanese Journal of Applied Physics, Supplements 18th Conference on Solid State Devices, pp. 303, 306, 1986.
Miyashita Naoto
Takahashi Koichi
Fourson George
Kabushiki Kaisha Toshiba
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