Semiconductor device having a substrate bias generator

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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3072966, 307303, H03K 301

Patent

active

053430875

ABSTRACT:
A semiconductor device includes an enhancement MOS transistor formed in a semiconductor substrate and a substrate bias generator supplies a predetermined bias voltage to the substrate. The impurity concentration of the substrate is within the range in which the enhancement MOS transistor keeps the enhancement mode when the substrate potential equals to the built-in potential .PHI.B.

REFERENCES:
patent: 4564854 (1986-01-01), Ogura
patent: 4670672 (1987-06-01), Ando et al.
patent: 4798974 (1989-01-01), Reczek et al.
H. Ishiuchi, et al., "Submicron CMOS Technologies for Four Mega Bit Dynamic Ram", May 1985, IEEE, pp. 706-709.

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