Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Reexamination Certificate
2006-06-27
2006-06-27
Huynh, Andy (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
C257S554000, C257S556000, C257S557000, C257S561000, C257S563000, C257S564000, C257S565000, C257SE29033
Reexamination Certificate
active
07067898
ABSTRACT:
A semiconductor structure having a self-aligned base contact and an emitter, where the base contact is electrically isolated from the emitter by a dielectric layer. The separation between the base contact and the emitter is determined by the thickness of the dielectric layer and the width of the emitter is determined by the minimum resolution provided by the fabrication techniques and tools used to define features within the dielectric layer.
REFERENCES:
patent: 5098853 (1992-03-01), Clark et al.
patent: 5159423 (1992-10-01), Clark et al.
patent: 5272095 (1993-12-01), Enquist et al.
patent: 5318916 (1994-06-01), Enquist et al.
patent: 5486483 (1996-01-01), Lammert
patent: 5610085 (1997-03-01), Yuan et al.
patent: 5641975 (1997-06-01), Agrarwal et al.
patent: 5648666 (1997-07-01), Tran et al.
patent: 5665614 (1997-09-01), Hafizi et al.
patent: 5672522 (1997-09-01), Streit et al.
patent: 5804487 (1998-09-01), Lammert
patent: 5903018 (1999-05-01), Shimawaki
patent: 6573539 (2003-06-01), Huang
patent: 6855948 (2005-02-01), Chow et al.
patent: 6873029 (2005-03-01), He et al.
patent: 2001/0013635 (2001-08-01), Kitahata
Arai, T., et al., “Reduction of Base-Collector Capacitance in Submicron InP/GaInAs Heterojunction Bipolar Transistors with Buried Tungsten Wires,”Jpn. J. Appl. Phys., vol. 40, Part 2, No. 7B, pp. L735-737 (Jul. 15, 2001).
Miyamoto, Y., et al., “Reduction of Base-Collector Capacitance in GaInAs/InP Heterojunction Bipolar Transistor By Using InP Buried Growth of Tungsten,”Department of Physical Electronics, Tokyo Institute of Technology, 4 pages total (2001).
Sun, M., et al., “A Non-Self Aligned InP HBT Production Process,”GasMANTECH Conference, 4 pages total (2002).
U.S. Appl. No. 11/109,288, filed Apr. 18, 2005, Thomas III et al.
Averett, K.L., et al. “Low-Voltage InAsP/InAs HBT and Metamorphic InAs BJT Devices Grown By Molecular Beam Epitaxy,”Journal of Crystal Growth, vol. 251, pp. 852-857 (2003).
Rieh, J.S., et al., “SiGe HBTs With Cut-Off Frequency of 350GHz,”IEEE International Electron Devices Meeting Digest, pp. 771-774 (2002).
Royter Yakov
Thomas, III Stephen
HRL Laboratories LLC
Huynh Andy
Ladas & Parry LLP
LandOfFree
Semiconductor device having a self-aligned base contact and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having a self-aligned base contact and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having a self-aligned base contact and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3634162