Semiconductor device having a security circuit for preventing il

Static information storage and retrieval – Floating gate – Data security

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Details

365201, 365226, 371 211, 711163, G11C 1604, G11C 700, G11C 2900

Patent

active

06002609&

ABSTRACT:
A testing pad is connected to an EEPROM through a wiring layer of a security circuit and a test circuit, while a testing pad is connected to the EEPROM through a wiring different from the wiring layer and the test circuit. A polysilicon pattern is connected to the wiring layer, and an n-type diffusion region is connected to the wiring. A tunnel insulation film having a thickness of about 100 .ANG. is formed between the polysilicon pattern and the n-type diffusion region. After a test for the function and stored information of the EEPROM is completed, a voltage, which is not lower than a predetermined voltage applied during the test, is applied between the testing pads to break the tunnel insulation film, thereby making the polysilicon pattern and n-type diffusion region conductive.

REFERENCES:
patent: 4268911 (1981-05-01), Bell
patent: 5175840 (1992-12-01), Sawase
patent: 5237531 (1993-08-01), Okano et al.
patent: 5465341 (1995-11-01), Doi et al.
patent: 5576988 (1996-11-01), Kuo et al.
patent: 5640347 (1997-06-01), Lin et al.
patent: 5642480 (1997-06-01), Brownlee et al.

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