Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Forming lateral transistor structure
Reexamination Certificate
2001-02-12
2002-08-20
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Forming lateral transistor structure
C438S374000, C438S487000
Reexamination Certificate
active
06436779
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a semiconductor device and a method of fabricating material for a semiconductor device.
It is well known in the semiconductor art that the spread of the depletion region of a reverse-biased rectifying junction (and so breakdown voltage of that junction) can be increased by reducing the dopant concentration and increasing the size of a semiconductor region associated with the rectifying junction. However, although this enables the reverse breakdown voltage to be increased, it also increases the resistivity and length of the current path through the device when the rectifying junction is forward biased in the ON condition of the device. This means that the series resistivity of the current path for majority charge carriers through the device increases in proportion to approximately the square of the desired reverse breakdown voltage, so limiting the current handling capability of the device for a given maximum thermal dissipation.
U.S. Pat. No. 4,754,310 (our reference PHB32740) addresses this problem by providing one of the regions forming the rectifying junction as a zone formed of first regions of one conductivity type interposed with second regions of the opposite conductivity type with the dopant concentrations and dimensions of the first and second regions being such that, when the rectifying junction is reversed biased in operation and the zone is depleted of free charge carriers, the space charge per unit area in the first and second regions balances at least to the extent that the electric field resulting from the space charge is less than the critical field strength at which avalanche breakdown would occur. This enables the required reverse breakdown voltage characteristics to be obtained using interposed semiconductor regions which individually have a higher dopant concentration, and thus lower resistivity, than would otherwise be required so that the series resistivity of the first and second regions and thus the ON resistance of the device can be lower than for conventional devices.
SUMMARY OF THE INVENTION
It is an aim of the present invention to provide another way of improving the trade off between breakdown voltage and on resistance in vertical high voltage semiconductor devices where the word “vertical” should be understood to mean that the main current flow path through the device is between first and second main opposed surfaces of the device.
According to one aspect of the present invention there is provided a semiconductor device wherein semi-insulative or leakage current paths are provided through a semiconductor region associated with a rectifying junction so that, when the rectifying junction is reversed biased in operation, the electrical potential distribution along the semi-insulative or leakage current paths causes the depletion region within the semiconductor region to spread through the semiconductor region to a greater extent than it would have done without the presence of the semi-insulative or leakage current paths so that the semiconductor region can be fully depleted of free charge carriers to enable the required reverse breakdown voltage to be achieved using semiconductor material that has a lower resistivity than would be required to achieve that breakdown voltage in the absence of the semi-insulating or leakage current paths.
In one aspect, the present invention provides a semiconductor device having first and second opposed major surfaces, the semiconductor device comprising a semiconductor first region provided between second and third regions such that the second region forms a rectifying junction with the first region and separates the first region from the first major surface and the third region separates the first region from the second major surface, the first region having dispersed therein a plurality of resistive paths each extending through the first region from the second toward the third region and each electrically isolated from the first region, for example by an intervening insulating layer, such that, in use, when a reverse biasing voltage is applied across the rectifying junction an electrical potential distribution is generated along the resistive paths which causes a depletion region in the first region to extend further through the first region to increase the reverse breakdown voltage of the device.
According to an aspect of the present invention, there is provided a semiconductor device as set out in claim
1
. The present invention also provides a method as set out in claim
10
.
The present invention thus enables a semiconductor device or material for forming a semiconductor device to be provided which enables the trade off between reverse breakdown voltage and on resistance to be improved in a manner that is different from that proposed in U.S. Pat. No. 4,754,310 and that may, at least in certain circumstances, be simpler and/or more economical to manufacture.
Other advantageous technical features in accordance with the present invention are set out in the appended dependent claims.
REFERENCES:
patent: 4611384 (1986-09-01), Bencuya et al.
patent: 4646115 (1987-02-01), Shannon et al.
patent: 4754310 (1988-06-01), Coe
patent: 6184555 (2001-02-01), Tihanyi et al.
patent: 6303969 (2001-10-01), Tan
patent: 19848828 (2000-05-01), None
Hurkx Godefridus A. M.
Van Dalen Rob
Biren Steven R.
Chaudhuri Olik
Koninklijke Philips Electronics , N.V.
Pham Hoai
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