Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Patent
1997-05-20
1999-05-11
Hardy, David B.
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular signal path connections
257203, H01L27/10
Patent
active
059030194
ABSTRACT:
A semiconductor device that reduces the pitch between adjacent I/O cell areas is disclosed. The semiconductor device permits more I/O cell areas to fit on an outer periphery of the semiconductor device by reducing the width of I/O cell areas. Hence, the semiconductor device is able to support a large number of external connection pins on the semiconductor device.
REFERENCES:
patent: 4992845 (1991-02-01), Arakawa et al.
patent: 5300796 (1994-04-01), Shintani
patent: 5347150 (1994-09-01), Sakai et al.
patent: 5386129 (1995-01-01), Koizumi
patent: 5404035 (1995-04-01), Taniguchi et al.
patent: 5485026 (1996-01-01), Hanibuchi
Fujitsu Limited
Hardy David B.
LandOfFree
Semiconductor device having a plurality of input/output cell are does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having a plurality of input/output cell are, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having a plurality of input/output cell are will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-247023