Semiconductor device having a plurality of input/output cell are

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

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257203, H01L27/10

Patent

active

059030194

ABSTRACT:
A semiconductor device that reduces the pitch between adjacent I/O cell areas is disclosed. The semiconductor device permits more I/O cell areas to fit on an outer periphery of the semiconductor device by reducing the width of I/O cell areas. Hence, the semiconductor device is able to support a large number of external connection pins on the semiconductor device.

REFERENCES:
patent: 4992845 (1991-02-01), Arakawa et al.
patent: 5300796 (1994-04-01), Shintani
patent: 5347150 (1994-09-01), Sakai et al.
patent: 5386129 (1995-01-01), Koizumi
patent: 5404035 (1995-04-01), Taniguchi et al.
patent: 5485026 (1996-01-01), Hanibuchi

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