Patent
1991-03-05
1992-09-01
Epps, Georgia Y.
357 231, 357 2311, 357 2314, 357 22, 357 68, H01L 2978
Patent
active
051443880
ABSTRACT:
According to this invention, in an element region formed in a semiconductor substrate, a plurality of regions for constituting one electrode of source and drain electrodes of an FET are formed. A gate electrode is formed to surround the plurality of regions. The other electrode of the FET is formed in the element region except for the plurality of regions surrounded by the gate electrode.
REFERENCES:
patent: 3355598 (1967-11-01), Tuska
patent: 4807002 (1989-02-01), Donzelli
Patent Abstracts of Japan, vol. 8, No. 53 (E-231) Mar. 9, 1984, and JP-A-58 207677 (Nihon Denki Aishii Maikon System) Dec. 3, 1983.
Patent Abstracts of Japan, vol. 12, No. 375 (E-666) Oct. 7, 1988 & JP-A-63 122276 (NEC Corp) May 26, 1988.
Patent Abstracts of Japan, vol. 10, No. 168 (E-411) (2224) Jun. 14, 1986) & JP-A-61 19174 (Toshiba K.K.) Jan. 28, 1986.
Ogihara Masaki
Sawada Shizuo
Epps Georgia Y.
Kabushiki Kaisha Toshiba
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