Semiconductor device manufacturing: process – Forming schottky junction – Combined with formation of ohmic contact to semiconductor...
Reexamination Certificate
1999-12-14
2002-10-01
Lee, Eddie (Department: 2815)
Semiconductor device manufacturing: process
Forming schottky junction
Combined with formation of ohmic contact to semiconductor...
C438S046000, C438S172000, C438S507000, C438S509000
Reexamination Certificate
active
06458675
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a method of manufacturing the same.
In general, the mobility of electrons in a low electrical field is higher in a compound semiconductor than in Si. This means that the speed of electrons moving in a compound semiconductor can be higher than in Si. Therefore, a compound semiconductor is suitable for micro-wave and millimeter-wave devices and high power devices. More particularly, field effect transistors having a Schottky junction gate utilizing gallium arsenide (GaAs), which is a typical material for compound semiconductors (hereinafter referred to as a “GaAs MESFET”), are under active research and development for reduced noise and increased power and are widely used as microwave devices.
FIG. 3
is a sectional view showing the configuration of a conventional field effect transistor (referred to as an “FET”). The FET shown in
FIG. 3
is a GaAs MESFET in which a buffer layer
113
made of, for example, non-doped GaAs or AlGaAs is formed on a semiconductor substrate
110
made of semi-insulating gallium arsenide, and an n-type active layer
111
is formed on the buffer layer
113
. A gate electrode
101
, a source electrode
102
, and a drain electrode
103
are formed on the surface of the active layer
111
. If the buffer layer
113
were not formed, a defect level of a very high density would be introduced at the interface between the n-type active layer
111
and the semiconductor substrate
110
. This would reduce mutual conductance g
m
and would result in generation of hysteresis in a current-voltage curve.
The conventional FET shown in
FIG. 3
, nevertheless, has surface defect states of a high density at the interface between the active layer
111
and the buffer layer
113
or between the buffer layer
113
and the semiconductor substrate
110
, or both. Also, electric potential changes abruptly at the interface. Therefore, the conventional FET has had a problem in that the breakdown voltages of the drain and gate cannot be made higher, because a leakage current at the interface under biased conditions is likely to be caused by the abrupt change in potential and the existence of the surface defect states.
In addition, the gate electrode
101
is usually biased to some degree with respect to the semiconductor substrate
110
during the operation of the FET, which may cause an electric current to flow between the gate electrode
101
and the semiconductor substrate
110
. Therefore, electrons or holes flow from the active layer
111
to the buffer layer
113
during the operation of the FET and result in formation of a depletion region which extends from the surface of the active layer
111
facing the buffer layer
113
to the inside of the active layer
111
. Since such a depletion region causes a change in potential in the active layer
111
, the formation of such a depletion region acts as a gate. That is, the so-called back gate effect occurs. As a result, there arises a problem that the conductivity of the active layer
111
under the gate electrode
101
changes and the drain current is distorted.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device and a method of manufacturing the same wherein the above-described problems are solved and wherein the breakdown voltages of the gate and drain can be made higher, and the distortion of the output signal relative to the input signal can be made smaller, as compared to the prior art.
According to preferred embodiments of the invention, a semiconductor device includes: a semiconductor substrate; an active layer; and a plasma-processed layer provided between the semiconductor substrate and the active layer. The plasma-processed layer has a deep defect level. First and second electrodes are electrically connected by ohmic contact with first and second portions of the active layer, respectively. The first and second portions are spaced apart at a predetermined interval from each other. A third electrode is formed on a third portion of the active layer, the third portion being located between the first and second portions of the active layer.
According to another aspect of the preferred embodiments of the present invention, a method of manufacturing a semiconductor device includes the steps of: exposing a surface of a semiconductor layer to a plasma such that a plasma-processed layer is formed at a surface region of the semiconductor layer; epitaxially growing an active layer on the plasma-processed layer; and providing at least one electrode on the active layer, the electrode being electrically in contact with the active layer.
In one preferred embodiment, the semiconductor device further includes a buffer layer between the semiconductor substrate and the plasma-processed layer.
According to a feature of the preferred embodiments, the deep defect level of the plasma-processed layer has an energy of about 0.6 to 0.8 eV.
According to another feature, the deep level is induced in the plasma-processed layer at a density of about 1×10
14
cm
−3
.
According to another feature, the plasma-processed layer is made of non-doped semiconductor.
According to another feature, the deep level traps electrons.
According to another feature, the semiconductor device is a metal semiconductor field effect transistor.
In the semiconductor device, the plasma-processed layer having deep defect levels of a high density is formed between said semiconductor substrate and the active layer. Since the deep level can trap electrons, electrons which move from the active layer toward the semiconductor substrate during the operation of the FET are trapped by the deep level. Therefore, the plasma-processed layer acts as a high-resistance layer and prevents a current from flowing from the active layer
11
toward the semiconductor substrate. This enables a gradual change in the electric potential at the interface between the active layer and the plasma-processed layer. Therefore, this reduces leakage current at said interface and improves the breakdown voltages of the gate and drain. Further, the back gate effect is reduced, which suppresses the modulation of the drain current. As a result, the distortion of the output signal relative to the input signal can be reduced.
For the purpose of illustrating the invention, there are shown in the drawings several forms which are presently preferred, it being understood, however, that the invention is not limited to the precise arrangements and instrumentalities shown.
Other features and advantages of the present invention will become apparent from the following description of embodiments of the invention which refers to the accompanying drawings.
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Manasreh, M.O., et al., “Observation of deep defects in As-rich GaAs grown by the molecular beam epitaxy technique at 200° C.”,Semi Insulating III-V(3-5)Materials, Toronto, May 13-16, 1990, No. Conf. 6, Jan. 1, 1990, pp. 105-110.
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Díaz José R
Lee Eddie
Murata Manufacturing Co. Ltd.
Ostrolenk Faber Gerb & Soffen, LLP
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