Semiconductor device having a passivation layer with silicon nit

Details Semiconductor device having a passivation layer with silicon nit Semiconductor device having a passivation layer with silicon nit

1991-10-15

1994-04-26

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

With means to control surface effects

Insulating coating

257760, J01L 23290, J01L 23485

Patent

active

053069463

ABSTRACT:
A semiconductor device is protected by a passivation layer, which includes underlying and overlying silicon nitride layers deposited by the plasma-assisted CVD method by changing layer forming conditions. The silicon nitride layers respectively have their intrinsic compressive stresses. The underlying silicon nitride layer in contact with a metal wiring layer has the intrinsic compressive stress of 3.times.10.sup.9 to 1.times.10.sup.10 dyne/cm.sup.2. The overlying silicon nitride layer has the intrinsic compressive stress which is less than or equal to half of the intrinsic compressive stress of the underlying silicon nitride layer. The underlying and overlying silicon nitride layers have different degrees of the hydrogen content. The underlying silicon nitride layer has the hydrogen content of 0.5.times.10.sup.20 to 5.times.10.sup.21 atm/cm.sup.3. The overlying silicon nitride layer has the hydrogen content which is more than or equal to twice of the hydrogen content of the underlying silicon nitride layer.

REFERENCES:
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patent: 4618878 (1986-10-01), Aoyama et al.
patent: 4723197 (1988-02-01), Takiar et al.
patent: 4728627 (1988-03-01), Mase et al.
patent: 5160998 (1992-11-01), Itoh et al.

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