Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2001-01-19
2003-09-16
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S701000, C257S704000, C257S728000, C257S620000, C257S622000, C257S784000, C257S787000, C438S430000, C438S462000
Reexamination Certificate
active
06621161
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, relates to a structure of a package of a high-frequency semiconductor element such as a GaAs-FET.
2. Background Art
In a semiconductor package utilized in a high-frequency band, more particularly the C-band or the Ku-band, a substance such as epoxy resin having a large dielectric constant comes into close contact with a semiconductor chip within a commonly-used mold package, thereby introducing parasitic capacitance and deteriorating the characteristics of the semiconductor package. To prevent such parasitic capacitance, a package having a hollow cavity is commonly used for encapsulating the semiconductor chip so that the air surrounds the top surface of the semiconductor chip.
In contrast with the commonly-used transfer mold package, the hollow package involves the following disadvantages and hence suffers negative aspects in terms of productivity and costs.
First, when packages are transported as separate pieces, the packages must be frequently rearranged in different layouts during assembly/test processes.
Further, when a carrier belt is used for transporting the packages, the packages may be brought into random arrangements upon undergoing very small physical shock. Further, in the case where the carrier belt is used for transporting the packages, there is a limitation on the number of packages processed by an automatic machine, thus deteriorating productivity of the semiconductor package.
Second, as is likely to be the case with a lead frame, separate packages are brazed to a metal frame through use of a brazing filler material of Ag in order to improve productivity, so that the packages are brazed so as to assume the structure of a commonly-used mold-type lead frame. In this case, however, brazing adds to the manufacturing costs. Further, even in terms of productivity, the separate packages must be individually sealed in the course of a sealing process. Thus, the hollow package is inferior in productivity to the mold package.
The present invention has been conceived to solve the problem in the background art, and the object of the present invention is to provide a semiconductor device encapsulated in a hollow package, which prevents deterioration of the high-frequency characteristics of the semiconductor device while ensuring the same productivity and costs as achieved by the mold package.
SUMMARY OF THE INVENTION
According to one aspect of the present invention, a semiconductor device is provided which is manufactured according to a following method. In the method, a semiconductor chip is housed in each of a plurality of cavities formed in the primary surface of a plate-like base substrate. A plate-like cap member is bonded onto the primary surface of the base substrate. Further, the bonded base substrate and cap members are separated along each space between adjacent cavities to thereby form a plurality of semiconductor devices which includes the semiconductor chip respectively.
According to another aspect of the invention, a semiconductor device comprises a first plate-like base substrate having a substantially rectangular extrapolated outer shape in a plane parallel to the primary surface thereof, and the first plate-like base substrate has a base electrode on the rear surface thereof. A second plate-like base substrate is connected to the primary surface of the first plate-like base substrate, and the second plate-like base substrate has a substantially same extrapolated outer shape in a plane parallel to the primary surface of the first plate-like base substrate. The second plate-like base substrate has a penetrating hole perpendicular to the primary surface of the first plate-like base substrate. A plate-like cap member is connected to the second plate-like base substrate to cover the penetrating hole in the second plate-like base substrate. A semiconductor chip is housed in a cavity surrounded by the first plate-like base substrate, the second plate-like base substrate and the plate-like cap member, and the semiconductor chip is electrically connected to the base electrode. Further, the first and second plate-like base substrates are cut off at each ridge portion of the side surfaces thereof which correspond to a corner portion of the substantially rectangular extrapolated outer shape.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
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McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Parekh Nitin
Thomas Tom
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