Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2000-07-11
2002-06-11
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S719000
Reexamination Certificate
active
06404059
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a technique for mounting a semiconductor substrate to an insulated circuit board, and particularly to a semiconductor device and a fabrication method thereof in which an electrode pad on a semiconductor substrate is connected to a terminal electrode of an insulated circuit board via a connecting conductor by making use of an opening provided in the insulated circuit board.
2. Background Art
FIG. 8
is a sectional view of a connection portion between a semiconductor substrate and an insulated circuit board and its neighborhood in a prior art semiconductor device in which the semiconductor substrate is mounted on the insulated circuit board. In
FIG. 8
, reference numeral
3
designates a semiconductor substrate;
1
designates an electrode pad of the semiconductor substrate
3
;
25
is an underlying metal film connection portion provided on the electrode pad
1
;
7
is a protective insulation film of the semiconductor substrate. Reference numeral
11
designates an insulated circuit board;
15
is a terminal electrode of the insulated circuit board
11
;
31
is a bump (eutectic solder) for connecting the electrode pad
1
and the terminal electrode
15
;
21
is a sealing resin for sealing the gap between the semiconductor substrate
3
and the insulated circuit board
11
;
27
is a solder resist; and
30
′ is a prior art semiconductor device including the above mentioned portions.
A method of manufacturing a prior art semiconductor device
30
′ by mounting a semiconductor substrate
3
on an insulated circuit board
11
will be described with reference to FIG.
8
. The semiconductor substrate
3
has an underlying metal film connection portion
25
connected to the electrode pad
1
through the opening formed in the protective insulation film
7
. The semiconductor substrate
3
is mounted on the insulated circuit board
11
in such a manner that the underlying metal film portion
25
is aligned to the bump
31
formed on the terminal electrode
15
. In such a state, the bump
31
is melted to join to the underlying metal film portion
25
, and then a gap between the semiconductor substrate
3
and the insulated circuit board
11
is sealed with a sealing resin
21
.
The prior art method, however, has the following problem. As the arrangement pitch of the electrode pads
1
becomes narrower along with the higher degree of integration of a semiconductor device, a gap between the semiconductor substrate
3
and the insulated circuit board
11
becomes narrower. Accordingly, there possibly occurs mismatching between the semiconductor substrate
3
and the insulated circuit board
11
due to thermal expansion, and thereby the stress applied to the bumps
31
is increased.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device in which an electrode pad on a semiconductor substrate is connected to a terminal electrode of an insulated circuit board via a connecting conductor by making use of an opening provided in the insulated circuit board, thereby improving the reliability in connecting the electrode pads on the semiconductor substrate to the insulated circuit board and also ensuring the reliability in connecting the electrode pads on the semiconductor substrate to the insulated circuit board even in the case where the arrangement pitch of the electrodes becomes narrower along with the higher degree of integration of the semiconductor device, and to provide a fabrication method thereof.
According to one aspect of the present invention, a semiconductor device comprises a semiconductor substrate including an electrode pad. An insulated circuit board is provided which has a main surface and a rear surface, and is disposed with its main surface facing the electrode pad of the semiconductor substrate. The insulated circuit board has a terminal electrode disposed at the rear surface or between the main surface and the rear surface, and has an opening at a position opposite to the electrode pad and formed from the main surface up to the terminal electrode. A connecting conductor is disposed through the opening, and connects the electrode pad on the semiconductor substrate with the terminal electrode on the insulated circuit board.
According to another aspect of the present invention, in a semiconductor device, an insulated circuit board has a terminal electrode disposed on the inner surface of an opening formed in the insulated circuit board. A connecting conductor is disposed through the opening, and connects the electrode pad on the semiconductor substrate with the terminal electrode on the insulated circuit board.
According to another aspect of the present invention, in a semiconductor device, the insulated circuit board has a terminal electrode at the rear surface or at a plane between the main surface and the rear surface surrounding the opening. A connecting conductor is disposed through the opening, and connects the electrode pad on the semiconductor substrate with the terminal electrode on the insulated circuit board.
According to another aspect of the present invention, in a semiconductor device, an insulated circuit board has a terminal electrode at a position on the rear surface near the opening. A connecting conductor is disposed through the opening, and connects the electrode pad on the semiconductor substrate with the terminal electrode on the insulated circuit board.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
REFERENCES:
patent: 5640047 (1997-06-01), Nakashima
patent: 5708567 (1998-01-01), Shim et al.
patent: 5756380 (1998-05-01), Berg et al.
patent: 5866942 (1999-02-01), Suzuki et al.
patent: 5953592 (1999-09-01), Taniguchi et al.
patent: 6031292 (2000-02-01), Murakami et al.
patent: 6268568 (2001-07-01), Kim
patent: 9-148479 (1997-06-01), None
patent: 11-74645 (1999-03-01), None
Iwasaki Toshihiro
Wakamiya Keiichiro
Le Bau T
Mitsubishi Denki & Kabushiki Kaisha
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