Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
2006-04-18
2006-04-18
Hoff, Marc S. (Department: 2857)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
C702S079000, C702S120000, C702S176000, C714S726000, C716S030000
Reexamination Certificate
active
07031864
ABSTRACT:
A semiconductor device including a first signal path for guiding an input signal from a first pad to an input terminal of a macro cell; a second signal path for guiding a clock from a second pad to a clock input terminal of the macro cell; a third signal path for guiding an output signal from a signal output terminal of the macro cell to a third pad; and a fourth signal path for receiving the clock from the first signal path and guiding the clock to a fourth pad. It is possible to eliminate wiring delay by measuring the time from when the input signal and the clock are supplied by the first and second pads until the output signal is output by the third pad, and the time from when the clock is supplied to the second path until it is output by the fourth pad.
REFERENCES:
patent: 4006467 (1977-02-01), Bowman
patent: 4878209 (1989-10-01), Bassett et al.
patent: 5198999 (1993-03-01), Abe et al.
patent: 5337321 (1994-08-01), Ozaki
patent: 5430394 (1995-07-01), McMinn et al.
patent: 5661685 (1997-08-01), Lee et al.
patent: 5696771 (1997-12-01), Beausang et al.
patent: 5774474 (1998-06-01), Narayanan et al.
patent: 5821786 (1998-10-01), Nozuyama et al.
patent: 5875114 (1999-02-01), Kagatani et al.
patent: 5923676 (1999-07-01), Sunter et al.
patent: 6144262 (2000-11-01), Kingsley
patent: 6189121 (2001-02-01), Ogawa
patent: 6266749 (2001-07-01), Hashimoto et al.
patent: 6272439 (2001-08-01), Buer et al.
patent: 6285229 (2001-09-01), Chu et al.
patent: 6308291 (2001-10-01), Kock et al.
patent: 6327218 (2001-12-01), Bosshart
patent: 6393592 (2002-05-01), Peeters et al.
patent: 6424583 (2002-07-01), Sung et al.
patent: 6434727 (2002-08-01), Ishii et al.
patent: 6512707 (2003-01-01), Miura et al.
patent: 6578166 (2003-06-01), Williams
patent: 6615380 (2003-09-01), Kapur et al.
patent: 6774693 (2004-08-01), Carr
patent: 6795931 (2004-09-01), LaBerge
patent: 6948106 (2005-09-01), Porterfield
patent: 2002/0015506 (2002-02-01), Aceti et al.
patent: 2003/0048142 (2003-03-01), Albean
patent: 2003/0222693 (2003-12-01), Cohen et al.
patent: 61016615 (1986-01-01), None
patent: 61016615 (1986-01-01), None
patent: 02184048 (1990-07-01), None
patent: 09127205 (1997-05-01), None
patent: 2000030492 (2000-01-01), None
patent: 2000030492 (2000-01-01), None
patent: 2002033455 (2002-01-01), None
Oracle ThinkQuest, “Circuit Schematic Symbols”. 1997. http://library.thinkquest.org/10784/circuit13symbols.html.
Hoff Marc S.
Volentine Francos & Whitt PLLC
West Jeffrey R
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