Active solid-state devices (e.g. – transistors – solid-state diode – With specified dopant
Reexamination Certificate
2001-05-30
2003-09-16
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
With specified dopant
C257S611000
Reexamination Certificate
active
06621145
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-270377, filed Sep. 6, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device. Particularly, the invention relates to a technique of reducing the electrical resistance of a metal-semiconductor junction.
2. Description of the Related Art
Hitherto, wires of aluminum or the like, which are formed on an insulating layer provided on a semiconductor substrate, are used to connect many elements provided in the semiconductor substrate and constituting an LSI or the like. Alternatively, such wires are used to connect individual semiconductor elements, LSIs or the like to external electric devices. In either case, it is important to decrease, in each semiconductor element, the contact resistance at the junction between any electrode part of the semiconductor substrate and the wiring metal layer contacting the electrode part. A method hitherto used to decrease the contact resistance is to dope the surface region of the substrate with a III-group or V-group impurity at high concentration, reducing the thickness of the Schottky barrier that contacts the wiring metal layer.
Ion implantation has been employed as an LSI-manufacturing technique to dope semiconductor substrates with a III- or V-group impurity at high concentration. Generally, ion implantation comprises three steps. In the first step, the atoms of the impurity are ionized in a vacuum. In the second step, the impurity ions are accelerated with a high voltage and implanted into a surface region of the substrate. In the third step, the substrate is heated, thus activating the impurity ions implanted into the surface region of the substrate. Instead, thermal diffusion may be used to dope semiconductor substrates with a III- or V-group impurity at high concentration. The thermal diffusion is performed in two steps. In the first step, a layer containing the III- or V-group impurity at high concentration is provided on a semiconductor substrate, e.g., a silicon substrate. In the second step, the resultant structure is heated, thereby diffusing the impurity from the layer into the semiconductor substrate.
Both the ion implantation and the thermal diffusion need to include a step of heating the unfinished structure at a high temperature of 600° C. or more. The highest concentration at which the impurity can be implanted into the surface region of the substrate is determined by the solid solubility which the impurity exhibits at the high temperature. Even if the impurity is ion-implanted at high concentration, the impurity injected into the substrate in an ensuing heat treatment may aggregate in the substrate and may become inactive. The carrier concentration is inevitably limited. The carrier concentration in semiconductor substrates, such as Si substrates, is in the order of 10
20
cm
−3
at most.
Semiconductor substrates into which impurities have been implanted in high concentration are readily oxidized at their surfaces in the atmosphere. If a thin metal film is formed on such a semiconductor substrate, whereby the substrate and the metal film constitute a metal-semiconductor junction, a barrier to moving carriers will be generated at the interface between the metal film and the substrate. Consequently, the metal-semiconductor junction will have high electrical resistance.
A technique has been reported, in which an impurity layer is first formed in the surface region of a semiconductor substrate and a thin semiconductor film is then formed on the impurity layer by means of molecular beam epitaxy or chemical vapor deposition. (See K. Nakagawa et al., Appl. Pnys. Letter 54 (1989), for the film formed by molecular beam epitaxy, and B. Tillack et al., Thin Solid Films, 294 (1997), 15, for the film formed by chemical vapor deposition.) Whether it is formed by molecular beam epitaxy or chemical vapor deposition, the thin semiconductor film has only 10
20
cm
−3
at most.
The integration density of semiconductor devices is increasing. Semiconductor memories, for example, have now storage capacity of gigabits. In view of this, the resistance of metal-semiconductor junctions is no longer negligible, particularly in LSIs that have numerous elements. The junction between a metal wiring layer and any high-impurity layer formed by thermal diffusion or ion implantation, either being a conventional method, has resistance of at least about 5×10
−7
&OHgr;·cm
2
. This value is equivalent to a resistance of as high as 5 k&OHgr; per 0.1×0.1 &mgr;m unit area of the junction. Being so high, the resistance of the metal-semiconductor junction is a great bar to the manufacture of high-speed, small-power LSIs and to the miniaturization of LSI elements.
BRIEF SUMMARY OF THE INVENTION
The present invention has been made in view of the foregoing. An object of the invention is to provide a technique of doping a semiconductor substrate with an impurity in the manufacture of an LSI, thereby to increase the concentration of a III-group or V-group impurity in a near-surface region of the semiconductor substrate. The increase in the impurity concentration of the near-surface region of the substrate lowers the contact resistance of any metal-semiconductor junction provided in the LSI. This renders it easy to reduce the size of the LSI elements. The LSI may be incorporated into a data communication apparatus or a data-processing apparatuses. If so, the LSI will enhance the operating speed of the apparatus and reduce the power consumption thereof.
To attain the object, a semiconductor device according to the present invention comprises: a IV-group semiconductor layer and a high-carrier-concentration region formed in the IV-group semiconductor layer and having an average carrier concentration of at least 10
21
cm
−3
.
In the semiconductor device, the high-carrier-concentration region may be one that has been formed by laying a plurality of n- or p-type impurity layers and a plurality of IV-group semiconductor layers, one upon another. Further, the high-carrier-concentration region may be one formed by means of chemical vapor-phase growth. Alternatively, the high-carrier-concentration region may be one that has been formed epitaxially.
Another type of a semiconductor device according to the invention comprises a metal-semiconductor junction composed of a semiconductor layer and a metal layer formed on the semiconductor layer. The semiconductor layer has a high-impurity-concentration region containing a III- or V-group element and having an average carrier concentration of at least 10
21
cm
−3
. It is desired that the high-impurity-concentration region be provided at a distance of at most 10 nm from an interface between the metal layer and the semiconductor layer.
In this semiconductor device, the semiconductor layer may have an impurity concentration of at most 10
20
cm
−3
at the interface between the metal layer and the semiconductor layer. Further, the high-impurity-concentration region may have an average impurity concentration that is an average value for regions existing in a region of the semiconductor layer, which is at least 7 nm thick, the average impurity concentration being at least 10
21
cm
−3
.
Still another type of a semiconductor device according to the invention comprises: a IV-group semiconductor substrate; a ¼-atom layer of impurity, formed on the IV-group semiconductor substrate by adsorbing the impurity in a concentration of about 1.7×10
14
cm
−2
; and a IV-group semiconductor layer epitaxially formed on the ¼-atom layer of impurity.
To attain the object mentioned above, a method of manufacturing the semiconductor device as defined in claim 9, comprising the steps of: supplying a hydride gas containing a III- or V-group element and a h
Matsuura Takashi
Murota Junichi
Sakuraba Masao
Shimamune Yosuke
Loke Steven
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
President of Tohoku University
Vu Hung Kim
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