Semiconductor device having a hetero-junction bipolar...

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor

Reexamination Certificate

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C257S195000, C257SE27015

Reexamination Certificate

active

07989845

ABSTRACT:
The object of the present invention is to provide a semiconductor device and the manufacturing method thereof which are capable of preventing decrease in the collector breakdown voltage and reducing the collector resistance. The semiconductor device according to the present invention includes: a HBT formed on a first region of a semiconductor substrate; and an HFET formed on a second region of the semiconductor substrate, wherein the HBT includes: an emitter layer of a first conductivity; a base layer of a second conductivity that has a band gap smaller than that of the emitter layer; a collector layer of the first conductivity or a non-doped collector layer; and a sub-collector layer of the first conductivity which are formed sequentially on the first region, and the HFET includes an electron donor layer including a part of the emitter layer, and a channel layer formed under the electron donor layer.

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Japanese Office Action dated Nov. 4, 2009 that issued with respect to patent family member Japanese Patent Application No. 2007-148638.
W.B. Chen, et al., (2003), IEEE Electron Device Letter, vol. 24, No. 10, pp. 619-621.
Hung-Tsao Hsu, et al., (2006), Semicond. Sci. Technol., vol. 21, pp. 1728-1732.
U.S. Appl. No. 12/400,376, “Semiconductor Device and Manufacturing Method Thereof,” filed Mar. 9, 2009 (co-pending, commonly assigned).
An English language abstract thereof (provided by Patent Abstracts of Japan).
Japanese Office Action dated Nov. 4, 2009 that issued with respect to patent family member Japanese Patent Application No. 2007-148638.

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