Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2007-03-20
2007-03-20
Andujar, Leonardo (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S684000, C257S796000
Reexamination Certificate
active
10352074
ABSTRACT:
A semiconductor element has a circuit formation surface on which electrode terminals are arranged in a peripheral part thereof. The semiconductor element is encapsulated by a mold resin on a substrate which has openings at positions corresponding to the electrodes of the semiconductor element. The semiconductor element is mounted to the substrate in a state where the circuit formation surface faces the substrate and the electrode terminals are positioned at the openings and a back surface opposite to the circuit formation surface of the semiconductor element is exposed from the mold resin. A heat-emitting member formed of a metal plate is provided on a surface of the substrate opposite to a surface on which the semiconductor element is mounted. The surface of the heat-emitting member being exposed from the mold resin.
REFERENCES:
patent: 5838072 (1998-11-01), Li et al.
patent: 6020637 (2000-02-01), Karnezos
patent: 6046495 (2000-04-01), Usushima
patent: 6175153 (2001-01-01), Yamada
patent: 6291884 (2001-09-01), Glenn et al.
patent: 6300685 (2001-10-01), Hasegawa et al.
patent: 6445077 (2002-09-01), Choi et al.
patent: 6507114 (2003-01-01), Hui et al.
patent: 6509642 (2003-01-01), Cohn
patent: 6528408 (2003-03-01), Kinsman
patent: 2001/0028110 (2001-10-01), Andoh
patent: 100 23 823 (2001-12-01), None
patent: 0 883 180 (1998-12-01), None
patent: 05 243317 (1993-09-01), None
patent: 06 084993 (1994-03-01), None
patent: 09-199629 (1997-07-01), None
patent: 09 237853 (1997-09-01), None
patent: 10-74795 (1998-03-01), None
patent: 10-74861 (1998-03-01), None
patent: 10-321670 (1998-12-01), None
patent: 11 031775 (1999-02-01), None
patent: 2000-150730 (2000-05-01), None
Wolf et al. , Silicon Processing for the VLSI Era, Lattice Press, vol. 1, pp. 857-858.
Shinko, JP-10074861 translation, Mar. 17, 1998.
Japanese Office Action dated Sep. 19, 2006 (mailing date), issued in corresponding Japanese Patent Application No. 2002-158277.
Abe Mitsuo
Hamano Toshio
Hiraiwa Katsuro
Honda Toshiyuki
Hosoyamada Sumikazu
Andujar Leonardo
Fujitsu Limited
Westerman, Hattori, Daniels & Adrian , LLP.
LandOfFree
Semiconductor device having a heat spreader exposed from a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having a heat spreader exposed from a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having a heat spreader exposed from a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3799810