Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2007-08-14
2007-08-14
Pham, Hoai (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257S758000, C257SE23145
Reexamination Certificate
active
10777189
ABSTRACT:
A multilayer interconnection structure of a semiconductor device includes a first guard ring extending continuously along a periphery of a substrate and a second guard ring extending continuously in the multilayer interconnection structure along the periphery so as to be encircled by the first guard ring and so as to encircle an interconnection pattern inside the multilayer interconnection structure, wherein the first and second guard rings are connected with each other mechanically and continuously by a bridging conductor pattern extending continuously in a band form along a region including the first and second guard rings when viewed in the direction perpendicular to the substrate.
REFERENCES:
patent: 6399897 (2002-06-01), Umematsu et al.
patent: 2005/0082577 (2005-04-01), Usui
patent: 2-123753 (1990-05-01), None
Kai Mutsuaki
Kato Hiroyuki
Suga Masato
Wakayama Shigetoshi
Fujitsu Limited
Pham Hoai
Westerman, Hattori, Daniels & Adrian , LLP.
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