Semiconductor device having a folded layer structure

Details Semiconductor device having a folded layer structure Semiconductor device having a folded layer structure

2005-08-16

2005-08-16

Eckert, George (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

Groove

C257S623000, C257S190000, C438S978000

Reexamination Certificate

active

06930376

ABSTRACT:
An upper reflecting layer in a main region, a first support region and a second support region is separated from an upper reflecting layer in the surrounding region by separating grooves. The first support region and the second support region are folded in a valley shape from a substrate at grooves, and the first support region, the second support region and the main region are folded in a mountain shape, and the upper reflecting layer in the main region faces parallel to the substrate with spacing.

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patent: 6534838 (2003-03-01), Vaccaro
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patent: 2003/0173583 (2003-09-01), Kubota
patent: 08114408 (1996-05-01), None

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