Semiconductor device having a chip-on-chip structure

Details Semiconductor device having a chip-on-chip structure Semiconductor device having a chip-on-chip structure

2000-02-02

2002-06-11

Lee, Eddie (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

C257S355000, C257S361000, C257S362000, C257S546000, C257S566000, C257S572000, C257S778000

Reexamination Certificate

active

06404060

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a device such as a transistor or laser diode and a protection circuit therefor.
2. Description of the Prior Art
FIG. 5
is an electrical circuit diagram showing the circuit configuration of a conventional driving circuit for driving an inductive load L such as a motor. This driving circuit is composed of four NPN-type transistors Q
1
, Q
2
, Q
3
, and Q
4
, which are so connected as to form a bridge circuit, with the NPN-type transistors Q
1
and Q
2
making a pair connected in series and the NPN-type transistors Q
3
and Q
4
making another pair connected in series. The node between the NPN-type transistors Q
1
and Q
2
is connected to one end of the load L, and the node between the NPN-type transistors Q
3
and Q
4
is connected to the other end of the load L.
The transistors Q
1
, Q
2
, Q
3
, and Q
4
have diodes D
1
, D
2
, D
3
, and D
4
connected thereto individually in the reverse direction so as to form a surge protection circuit. A back electromotive force developed in the inductive load L causes a surge voltage higher than the supplied voltage to appear across the inductive load L. Such a surge voltage, if any appears, is led through the diodes D
1
, D
2
, D
3
, and D
4
to the power lines (Vcc and GND). This helps protect the transistors Q
1
, Q
2
, Q
3
, and Q
4
by preventing the surge voltage from being applied directly thereto.
A similar protection circuit is provided also in a laser diode or the like. Here, between the two terminals of the laser diode, a diode is connected so as to absorb a surge voltage.
When the driving circuit shown in
FIG. 5
is formed on a semiconductor chip to produce a bipolar IC, it is customary to form the NPN-type transistors and the diodes constituting the protection circuit in separate device formation regions from one another, with P-type separation regions formed between them, so that different devices are electrically separated from one another by a so-called PN separation structure. In this case, although the P-type separation regions need to be kept at the lowest potential, a surge voltage from the inductive load L does not ensure that the P-type separation regions are kept at the lowest potential, and this may hinder the PN separation structure from achieving satisfactory separation between different devices. That is, the parasitic transistors formed near the P-type separation regions conduct and thereby allow the NPN-type transistors, even though formed in different device formation regions, to affect one another, causing crosstalk. For this reason, it has conventionally been difficult to form a driving circuit having a surge protection circuit in a bipolar IC.
Moreover, a device that is formed singly, such as a laser diode, has a structure different from ordinary structures, and therefore it has also been difficult to form such a device into a one-chip IC incorporating a surge protection circuit therefor.
Thus, there is no choice but to form a device requiring surge protection and a protection circuit therefor in two separate ICs. This lowers the integration density of such devices.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device that, despite having a device requiring surge protection and a protection circuit therefor, allows the substantial integration density to be improved.
To achieve the above object, according to one aspect of the present invention, a semiconductor device is provided with a first semiconductor chip having a device formed thereon and a second semiconductor chip having a protection circuit for protecting the device formed thereon, and the second semiconductor chip is superposed on and bonded to the surface of the first semiconductor chip.
In this structure, a device and a protection circuit therefor are formed on separate semiconductor chips, and one of these semiconductor chips is superposed on and bonded to the other so as to form a semiconductor device having a so-called chip-on-chip structure. This helps avoid the difficulties that are inevitable when a device and a protection circuit therefor are formed on a single chip, and simultaneously improve the substantial integration density.
According to another aspect of the present invention, a semiconductor device is provided with a first semiconductor chip having a plurality of bipolar transistors formed thereon and a second semiconductor chip having a protection circuit for protecting the bipolar transistors formed thereon, and the second semiconductor chip is superposed on and bonded to the surface of the first semiconductor chip.
In this structure, devices and the protection circuit therefor are formed on separate semiconductor chips, which are then superposed on and bonded to each other so as to form a semiconductor device having a so-called chip-on-chip structure. This helps avoid the difficulties that are inevitable when devices and a protection circuit therefor are formed on a single chip, and simultaneously improve the substantial integration density.


REFERENCES:
patent: 4697095 (1987-09-01), Fujii
patent: 5523622 (1996-06-01), Harada et al.
patent: 5644164 (1997-07-01), Weiler et al.
patent: 6046901 (2000-04-01), Davis et al.
patent: 6198136 (2001-03-01), Voldman et al.
patent: 11-195744 (1999-07-01), None
patent: 11-195744 (1999-07-01), None

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