Semiconductor device having a bump structure and test electrode

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

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Details

257738, 257781, 257766, 257764, 257763, 257786, 257734, H01L 2950, H01L 2978, H01L 2354

Patent

active

058545131

ABSTRACT:
A bump structure of a semiconductor device includes at least one pad electrode formed on a semiconductor substrate; a test electrode formed on the semiconductor substrate, the pad electrode and the test electrode being located separately from one another; a passivation layer formed on an area of the semiconductor substrate other than that covered by the pad electrode and the test electrode; a metal layer integrally formed on a portion of the pad electrode and on a portion of the test electrode adjacent to the pad electrode; and a bump formed on an overall surface of the metal layer.

REFERENCES:
patent: 3942187 (1976-03-01), Gelsing et al.
patent: 4434434 (1984-02-01), Bhattacharya et al.
patent: 5046161 (1991-09-01), Takada
patent: 5349239 (1994-09-01), Sata
patent: 5554887 (1996-09-01), Sawai et al.
patent: 5629564 (1997-05-01), Nye, III et al.
patent: 5631499 (1997-05-01), Hosomi et al.
patent: 5665639 (1997-09-01), Seppala et al.

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