Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2007-09-18
2007-09-18
Thai, Luan (Department: 2891)
Semiconductor device manufacturing: process
With measuring or testing
C438S015000, C438S110000, C438S113000, C257SE21523, C257SE21521, C257SE21522
Reexamination Certificate
active
11009598
ABSTRACT:
A bond pad (10) has a probe region (14) and a wire bond region (12) that are substantially non-overlapping. In one embodiment, the bond pad (10) is connected to a final metal layer pad (16) and extends over an interconnect region (24). The bond pad (10) is formed from aluminum and the final metal layer pad (16) is formed from copper. Separating the probe region (14) from the wire bond region (12) prevents the final metal layer pad (16) from being damaged by probe testing, allowing for more reliable wire bonds. In another embodiment, the probe region (14) extends over a passivation layer (18). In an application requiring very fine pitch between bond pads, the probe regions (14) and wire bond regions (12) of a plurality of bond pads formed in a line may be staggered to increase the distance between the probe regions (14). In addition, forming the bond pads (10) over the interconnect region (24) reduces the size of the integrated circuit.
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Schiml et al.,“A.O.13μm CMOS Platform with Cu/Low-k Interconnects for System on Chip Applications,” IEEE 2001 Symposium on VLSI Technology Digest of Technical Papers, 2 pgs.
Dinh Dieu Van
Harper Peter R.
Leal George R.
Metz Jeffrey W.
Tran Tu Anh
Freescale Semiconductor Inc.
Hill Daniel D.
Thai Luan
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