Semiconductor device having a barrier film for preventing penetr

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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257773, 257774, H01L 2348

Patent

active

061113204

ABSTRACT:
By assuming a symbol A for the contact depth, B for the diameter of the contact, C for the thickness of the underlay oxide to be formed between the barrier film and the semiconductor substrate, and D for the eave protrusion length of the barrier film the eaves being formed inside the contact when oxide wet etching is performed for removing natural oxide on the silicon and for reducing the contact resistance, the following relation is established,

REFERENCES:
patent: 5210054 (1993-05-01), Ikeda et al.
M. Noyori et al., "Secondary Slow Trapping--A New Moisture Induced Stability Phenomenon In Scaled CMOS Devices", 20th Annual Proceedings International Reliability Physics Symposium, 1982, pp. 113-121.

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