Semiconductor device formed in a recrystallized layer

Details Semiconductor device formed in a recrystallized layer Semiconductor device formed in a recrystallized layer

2009-02-09

2010-12-28

Lindsay, Jr., Walter L (Department: 2812)

Active solid-state devices (e.g., transistors, solid-state diode

Thin active physical layer which is

Heterojunction

C257S020000, C257S065000, C257S069000, C257S070000, C257S369000, C257S374000, C257S513000, C257S616000, C257SE29252, C257SE21545, C257SE21574

Reexamination Certificate

active

07858964

ABSTRACT:
A semiconductor device includes a substrate that includes a first layer and a recrystallized layer on the first layer. The first layer has a first intrinsic stress and the recrystallized layer has a second intrinsic stress. A transistor is formed in the recrystallized layer. The transistor includes a source region, a drain region, and a charge carrier channel between the source and drain regions. The second intrinsic stress is aligned substantially parallel to the charge carrier channel.

REFERENCES:
patent: 5447884 (1995-09-01), Fahey et al.
patent: 5693546 (1997-12-01), Nam et al.
patent: 5792679 (1998-08-01), Nakato
patent: 5972761 (1999-10-01), Wu
patent: 5989978 (1999-11-01), Peidous
patent: 6046487 (2000-04-01), Benedict et al.
patent: 6069049 (2000-05-01), Geiss et al.
patent: 6271068 (2001-08-01), Hsu et al.
patent: 6573172 (2003-06-01), En et al.
patent: 6657276 (2003-12-01), Karlsson et al.
patent: 6730583 (2004-05-01), Oh et al.
patent: 6808970 (2004-10-01), Feudel et al.
patent: 6890808 (2005-05-01), Chidambarrao et al.
patent: 6900502 (2005-05-01), Ge et al.
patent: 6939814 (2005-09-01), Chan et al.
patent: 6943391 (2005-09-01), Chi et al.
patent: 6952289 (2005-10-01), Fujimoto et al.
patent: 6972247 (2005-12-01), Bedell et al.
patent: 7094671 (2006-08-01), Li
patent: 7105394 (2006-09-01), Hachimine et al.
patent: 7169659 (2007-01-01), Rotondaro et al.
patent: 7307273 (2007-12-01), Currie
patent: 7488670 (2009-02-01), Knoefler et al.
patent: 2002/0055241 (2002-05-01), Oh et al.
patent: 2003/0146494 (2003-08-01), Puchner et al.
patent: 2003/0181005 (2003-09-01), Hachimine et al.
patent: 2003/0227036 (2003-12-01), Sugiyama et al.
patent: 2004/0212035 (2004-10-01), Yeo et al.
patent: 2004/0221792 (2004-11-01), Forbes
patent: 2004/0232513 (2004-11-01), Chi et al.
patent: 2004/0251479 (2004-12-01), Tsutsui et al.
patent: 2005/0124146 (2005-06-01), Bedell et al.
patent: 2005/0136583 (2005-06-01), Chen et al.
patent: 2005/0196925 (2005-09-01), Kim et al.
patent: 2005/0224798 (2005-10-01), Buss
patent: 2005/0255667 (2005-11-01), Arghavani et al.
patent: 2005/0260806 (2005-11-01), Chang et al.
patent: 2006/0099765 (2006-05-01), Yang
patent: 2007/0012960 (2007-01-01), Knoefler et al.
patent: 2007/0190741 (2007-08-01), Lindsay
patent: 2007/0275522 (2007-11-01), Yang
patent: 2009/0050981 (2009-02-01), Tsutsui et al.
patent: 10 2006 030 647 (2007-02-01), None
patent: 9-219524 (1997-08-01), None
patent: 2009-219524 (1997-08-01), None
patent: 2003-273240 (2003-09-01), None
patent: 2005-005633 (2005-01-01), None
patent: WO 2004/061921 (2004-07-01), None
patent: WO 2005/055290 (2005-06-01), None
patent: WO 2006/053258 (2006-05-01), None
patent: WO 2006/053258 (2006-05-01), None
Jae-Geun, O., et al., “Method for Fabricating Semiconductor Device,” Mar. 11, 2003, Hynix Semiconductor Inc., Taiwan English Abstract of TW523869B, 1 Page.
Chi, M.-H., et al., “Modification of Carrier Mobility in a Semiconductor Device,” Jun. 1, 2005, Taiwan Semiconductor Manufacturing Co. Ltd., English Abstract of TW 200518239, 1 Page.
Chen, C.H., et al., “Advanced Strained-Channel Technique to Improve CMOS Performance,” Jul. 1, 2005, Taiwan Semiconductor Manufacturing Co. Ltd., English Abstract of TW 200522348, 1 Page.
Chen, C-H, et al., “Stress Memorization Technique (SMT) by Selectively Strained-Nitride Capping for Sub-65nm High-Performance Strained-Si Device Application,” 2004 Symposium on VLSI Technology Digest of Technical Papers, 2004, pp. 56-57, IEEE.
Chan, V., et al., “Strain for CMOS performance Improvement,” IEEE 2005 Custom Integrated Circuits Conference, 2005, pp. 667-674, IEEE.
Tsaur, B-Y., et al., “Stress-Enhanced Carrier Mobility in Zone Melting Recrystallized Polycrystalline Si Films on SiO2-Coated Substrates,” Applied Physics Letters, Feb. 15, 1982, 3 pages, American Institute of Physics.

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