Semiconductor device for reducing plasma charging damage

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation

Reexamination Certificate

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C257S549000, C257S500000

Reexamination Certificate

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07026704

ABSTRACT:
A semiconductor device and method of manufacturing the semiconductor device including a semiconductor substrate of a first conductivity type. A scribe lane area formed in the substrate to define chip formation areas. A deep well area formed in each chip formation area. The deep well area has a second conductivity type which is opposite the first conductivity type. Also, at least one well area is formed within the deep well area.

REFERENCES:
patent: 5614445 (1997-03-01), Hirabayashi
patent: 5698454 (1997-12-01), Zommer
patent: 5998282 (1999-12-01), Lukaszek
patent: 6055655 (2000-04-01), Momohara
patent: 6156596 (2000-12-01), Jwo
patent: 6159826 (2000-12-01), Kim et al.
patent: 06005583 (1994-01-01), None

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