Semiconductor device for reducing effects of noise on an...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular power supply distribution means

Reexamination Certificate

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C257S208000, C257S691000, C307S032000, C307S042000, C327S530000, C327S535000, C327S379000, C361S110000, C361S111000, C361S622000

Reexamination Certificate

active

06331719

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor devices and, more particularly, to a semiconductor device for reducing effects of noise on a circuit in a semiconductor device.
2. Description of the Background Art
A conventional semiconductor device for reducing effects of noise upon an internal circuit is disclosed in, for example, Japanese Patent Laying-Open No. 5-128855.
FIG. 28
is a schematic block diagram showing a conventional semiconductor device.
Referring to
FIG. 28
, a conventional semiconductor device
5
includes a package frame
1
, a bonding wire
3
, a pad
11
, an internal power supply line
1511
, an internal circuit
21
, a stabilize circuit
23
which is to be stabilized, a GND package frame
7
, a GND bonding wire
9
, a GND pad
17
, and an internal GND line
19
.
Bonding wire
3
has one end connected to package frame
1
and the other end connected to pad
11
, which is also connected to internal power supply line
1511
. Internal power supply line
1511
is connected to internal circuit
21
and stabilize circuit
23
. GND bonding wire
9
has one end connected to GND package frame
7
and the other end connected to GND pad
17
, which is also connected to internal GND line
19
. Internal GND line is connected to internal circuit
21
and stabilize circuit
23
.
Internal circuit
21
and stabilize circuit
23
of semiconductor device
5
receive an externally applied power supply potential through package frame
1
, bonding wire
3
, pad
11
and internal power supply line
1511
. Internal circuit
21
and stabilize circuit
23
of semiconductor device
5
also receive an externally applied power supply potential (such as a ground potential) through GND package frame
7
, GND bonding wire
9
, GND pad
17
and internal GND line
19
, which potential is different from the power supply potential applied through package frame
1
.
Internal circuit
21
is provided in semiconductor device
5
and associated with the operations thereof. In other words, it is a circuit which brings about noise, including a word line drive circuit, a data bus drive circuit, and a data output circuit.
Stabilize circuit
23
is easily affected by noise, such as a circuit for controlling a signal of a small analog value and a circuit operating with an extremely small current (for example, on the order of &mgr;A) when semiconductor device
5
is in a standby state. The circuit for controlling a small analog value includes a reference potential generation circuit.
Internal circuit
21
consumes a considerable amount of electric power during operation. As a result, noise is generated at internal power supply line
1511
and internal GND line
19
.
FIG. 29
shows the noise level generated when internal circuit
21
of semiconductor device
5
operates.
As indicated by an arrow a, noise of a level lower than that of a power supply potential Vcc is generated at internal power supply line
1511
. As indicated by an arrow b, noise of a level higher than a ground potential GND level is generated at internal GND Line
19
.
Although such noise is somewhat absorbed by a lowpass filter including an interconnection resistance and a parasitic capacitance of internal power supply line
1511
and a lowpass filter including an interconnection resistance and a parasitic capacitance of internal GND line
19
during propagation to stabilize circuit
23
, significant effects are given to stabilize circuit
23
.
As described above, a power supply line for applying power supply potential Vcc is common to internal circuit
21
and stabilize circuit
23
in the conventional semiconductor device
5
. In other words, power supply potential Vcc is applied to internal circuit
21
and stabilize circuit
23
through internal power supply line
1511
. Consequently, noise accompanied with operation of internal circuit
21
is provided to stabilize circuit
23
along with power supply potential Vcc. Therefore, malfunction is undesirably caused at stabilize circuit
23
.
Ground potential GND is provided to internal circuit
21
and stabilize circuit
23
through internal GND line
19
. Therefore, noise accompanied with operation of internal circuit
21
is also provided to stabilize circuit
23
along with ground potential GND, thereby causing malfunction of stabilize circuit
23
.
SUMMARY OF THE INVENTION
The present invention solves the above-described problems, and an object thereof is to provide a semiconductor device capable of reducing effects of noise from an internal circuit causing noise on an internal circuit (stabilize circuit) susceptible to the noise.
Another object of the present invention is to provide a semiconductor device capable of facilitating provision and reception of a voltage at an arbitrary point on the semiconductor device.
A semiconductor device according to a first aspect of the present invention includes a first internal circuit causing noise, a second internal circuit affected by the noise, a first power supply potential provision line for providing the first internal circuit with a first power supply potential, a second power supply potential provision line for providing the second internal circuit with the first power supply potential, and a connection member for connecting the first and second power supply potential provision lines.
In the semiconductor device according to the first aspect of the present invention, the first and second power supply potential provision lines have parasitic resistance and the first connection member has parasitic capacitance, so that they collectively serve as a filter element.
Consequently, noise propagating from the first internal circuit to the second internal circuit through the first power supply potential provision line, the first connection member, and the second power supply potential provision line can be reduced.
As a result, effects of noise given by the first internal circuit to the second internal circuit can be diminished.
A semiconductor device according to a second aspect of the present invention includes a first internal circuit formed on a semiconductor substrate and causing noise, a second internal circuit formed on the semiconductor substrate and affected by the noise, a first power supply potential provision line for providing a first power supply potential, a second power supply potential provision line having one end connected to the first power supply potential provision line and providing the first internal circuit with the first power supply potential, a third power supply potential provision line having one end connected to the first power supply potential provision line for providing the second internal circuit with the first power supply potential, and a first filter provided at the third power supply potential provision line for reducing the noise.
In the semiconductor device according to the second aspect of the present invention, the noise propagated from the first internal circuit to the second internal circuit through the first, the second, and the third power supply potential lines passes through the first filter provided at the third power supply potential provision line.
As a result, the noise propagated from the first internal circuit to the second internal circuit can be reduced.
Consequently, effects of the noise given by the first internal circuit to the second internal circuit is diminished.
A semiconductor device according to a third aspect of the present invention includes a first internal circuit causing noise, a second internal circuit affected by the noise, an internal potential generation circuit for generating an internal potential, a first internal potential provision line for providing the internal potential, a second internal potential provision line having one end connected to the first internal potential provision line for providing the first internal circuit with the internal potential, a third internal potential provision line having one end connected to the first internal potential provision line for providing the second internal circuit wi

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