Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Reexamination Certificate
2000-04-26
2002-01-22
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
C257S481000
Reexamination Certificate
active
06340836
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor device for rectifying aimed for high withstand voltage including principally a pn junction. More specifically, the present invention relates to a semiconductor device for rectifying for making forward voltage drop small as well as making switching speed (reverse recovery time, Trr) fast, still maintaining high withstand voltage.
BACKGROUND OF THE INVENTION
The conventional semiconductor devices for rectifying are classified into the pn junction structure type and the Schottky barrier structure type (hereinafter referred to as SBD). The pn junction type one has characteristics in which although forward voltage drop is large, the structure is hard to be broken also against the reverse direction high voltage, so, consequently, this type is used for high withstand voltage use. The SBD type one has characteristics in which although this type is not suitable for high withstand voltage use, particularly forward voltage drop is small as well as switching time Trr is fast, so, this type is used effectively for also high frequency circuits and so on.
The conventional diode for rectifying including a pn junction structure is constructed as shown in, for example, FIG.
8
. Referring to
FIG. 8
, reference numeral
21
denotes an n
+
-type semiconductor substrate, on which an n
−
-type epitaxial growth layer
22
is formed to a thickness of, for example, approximately 50 micrometers; and p
+
-type diffusion region
23
is provided into the surface portion of the epitaxial growth layer
22
, to a depth of, for example, approximately 20 micrometers forming a pn junction with the epitaxial growth layer
22
. Around the pn junction, p-type FLRs
24
are provided for improving high withstand voltage in the transverse direction. For such use in which the withstand voltage is greater than, for example, approximately 500 volts, in the semiconductor device for rectifying including a pn junction structure, the thickness d of the epitaxial growth layer
22
in the bottom portion of the p
+
-type diffusion region
23
is formed to be thicker so that the thickness d is greater than 50 micrometers. Reference numeral
125
denotes an insulator film,
26
and
27
denote a p-side electrode and an n-side electrode, respectively, each made of Ag, Al or the like.
In this semiconductor device for rectifying including a pn junction type, when operation is made to be off (that is, the applied voltage is in the reverse direction), unless positive holes, which are minority carriers injected in the n
−
-type epitaxial growth layer
22
, disappear immediately, electric current flow does not become zero and then the switching speed becomes slow. For the reason mentioned above, in the conventional art, a countermeasure is adopted in which a heavy metallic material such as, for example, Au or the like is diffused in advance in the epitaxial growth layer
22
so that minority carriers can be trapped easily to make the switching speed fast. As shown in
FIG. 9
, diffusing a heavy metallic material is preferable because the smaller the switching speed Trr is made to be when the more doping amount is increased. However, since electric resistance in the epitaxial growth layer
22
is more increased, when such a heavy metallic material is diffused, as shown in
FIG. 9
, when the more doping amount of such a heavy metal is increased, the larger forward voltage drop V
F
becomes and the doping amount is in trade off relation with switching speed. Therefore, switching speed Trr can not be made to be sufficiently fast. In addition, although not illustrated, the more doping amount of a heavy metal is increased, the more leakage of electric current is increased.
On the other hand, for the purpose of improving withstand voltage in the SBD structure, as disclosed in Japanese Patent Publication Tokko-Sho59-35183 or as shown in FIG.
10
(
a
), there proposed a structure in which a p
+
-type region
28
is formed in an island like shape or a stripe shape in the n
−
-type epitaxial growth layer
22
, and a depletion layer formed in the epitaxial growth layer side sandwiched between the p
+
-type regions
28
reduces the reverse direction leakage current, so that the withstand voltage is enhanced. However, in this structure, the principal part of the structure is the Schottky barrier junction and then the area of the SBD portion is more than half of the layer. In addition, in FIG.
10
(
a
), an identical portion is referred as the same reference numeral in FIG.
8
. Reference numeral
29
denotes an electrode forming Schottky junction between the epitaxial growth layer and the electrode itself.
In addition, as disclosed in, for example, Japanese Published Unexamined Patent Publication Tokkai-Hei7-226521, there proposed a structure in which both a Schottky junction and a pn junction are arranged in parallel in the semiconductor body so that the each preferable characteristics is incorporated simultaneously thereto with the ratio of each being nearly the same; the surface side of the p
−
-type region is made to be p
+
-type region so that the amount of the carrier injection to the underside of the Schottky barrier junction is made to be increased; and minority carriers remaining in n
−
-type region are made to disappear rapidly. Further, the ratio, which is disclosed in the above publication, between the Schottky junction and the pn junction is exemplified as follows: W
p
representing the width of the pn junction to be 15 micrometers and W
N
representing the width of the Schottky barrier portion to be 5 micrometers (W
P
:W
N
=3:1); as shown in FIG.
10
(
b
), the ratio of the area Q of Schottky barrier portion to the area P of the pn juntion portion is as follows: {13×13−3×3×9(pieces)}:{3×3×9(pieces)}=88:81=1.09:1; and the ratio of each region nearly equals to each other.
As mentioned above, for the purpose of enhancing withstand voltage in Schottky barrier semiconductor device, the structure in which a pn junction is provided in an island like shape or a stripe shape in semiconductor layers where Schottky junction is provided, so that both a Schottky junction and a pn junction are arranged in parallel is well-known. However, for the purpose of obtaining a semiconductor device for rectifying, especially for super high withstand voltage, for example, from not less than 200 volts to approximately 1700 volts, unless making the thickness d of the epitaxial layer shown in
FIG. 8
or
FIG. 10
to be thicker, sufficient withstand voltage cannot be obtained. If the distance d is large, series resistance in the SBD portion becomes large and the influence upon forward voltage drop becomes remarkable. Thus, there arises a problem where a semiconductor device for rectifying aimed for high withstand voltage in which forward voltage drop is made to be small and switching time is made to be fast is not obtained.
SUMMARY OF THE INVENTION
The present invention is achieved in order to solve the above mentioned problem. The purpose of the present invention is to provide a semiconductor device for rectifying having pn junction in which high withstand voltage is still maintained and, further, switching speed is fast through making minority carriers remaining in semiconductor layers disappear immediately in the transient period in which operation is made to be off(forward direction potential is changed to reverse direction potential).
The semiconductor device for rectifying of the present invention comprises: a semiconductor substrate of a first conductivity type with a high impurity concentration;
a semiconductor layer of the first conductivity type with a low impurity concentration formed by epitaxial growth on the semiconductor substrate;
a plurality of semiconductor regions of a second conductivity type formed in a surface side of the semiconductor layer; and
a metal layer formed on a surface of the semiconductor layer and on a surface of the semi
Arent Fox Kintner & Plotkin & Kahn, PLLC
ROHM Co. Ltd.
Vu David
LandOfFree
Semiconductor device for rectifying does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device for rectifying, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device for rectifying will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2871840