Static information storage and retrieval – Floating gate – Multiple values
Patent
1999-05-25
2000-06-20
Nelms, David
Static information storage and retrieval
Floating gate
Multiple values
36518518, 36518521, 36518533, G11C 1604
Patent
active
060785195
ABSTRACT:
Data are generated based on additional write data input to data latch circuits (DLR and DLL) and data read from memory cells (MC) to program non-volatile memory cells in a write state into the same write state and to program non-volatile memory cells in an erase state into a write state indicated by the additional write data. The generated data are latched in the data latch circuits to perform a logical synthesis process for additional writing. Even after the additional write operation, the logically synthesized data remain in the data latch circuits, and the latched data can be reused against abnormality in writing. This eliminates the need for receiving write data again from the outside when the additional write operation is to be retried.
REFERENCES:
patent: 5870218 (1999-02-01), Jyouno et al.
Harada Toshinori
Kanamitsu Michitaro
Kotani Hiroaki
Kubono Shoji
Nozoe Atsushi
Hitachi , Ltd.
Hitachi ULSI Systems Co. Ltd.
Lam David
Nelms David
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