Semiconductor device comprising trench isolation insulator...

Details Semiconductor device comprising trench isolation insulator... Semiconductor device comprising trench isolation insulator...

1998-07-16

2001-06-12

Dang, Trung (Department: 2823)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S435000, C438S437000

Reexamination Certificate

active

06245641

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same, and more specifically, it relates to a semiconductor device comprising trench isolation insulator films and a method of fabricating the same.
2. Description of the Prior Art
Following refinement and high integration of a semiconductor device, trench isolation oxide films are generally employed for electrically isolating elements which are formed on a major surface of a semiconductor substrate from each other.
FIG. 26
is a sectional view for illustrating conventional trench isolation oxide films. With reference to
FIG. 26
, the conventional trench isolation oxide films are now described.
Referring to
FIG. 26
, trenches
104
a
to
104
c
are formed on a major surface of a semiconductor substrate
101
. Thermal oxide films
105
a
to
105
c
are formed on surface portions of the semiconductor substrate
101
located in the trenches
104
a
to
104
c
respectively. Oxide films
113
a
to
113
c
serving as isolation insulator films are formed in the trenches
104
a
to
104
c
by chemical vapor deposition (hereinafter referred to as CVD) respectively. The widths W
1
of the oxide films
113
a
to
113
c
and the intervals therebetween (the widths of element forming regions on the major surface of the semiconductor substrate
101
) are set at various values in a single semiconductor device.
FIGS. 27
to
30
are sectional views for illustrating steps of forming the conventional trench isolation oxide films
113
a
to
113
c
shown in FIG.
26
. With reference to
FIGS. 27
to
30
, the steps of forming the conventional trench isolation oxide films
113
a
to
113
c
are now described.
First, a thermal oxide film (not shown) is formed on the major surface of the semiconductor substrate
101
(see FIG.
27
). A silicon nitride film (not shown) is formed on this thermal oxide film. A resist pattern (not shown) is formed on this silicon nitride film and thereafter employed as a mask for partially removing the silicon nitride film and the thermal oxide film by anisotropic etching. Thereafter the resist pattern is removed. Thus, thermal oxide films
102
a
to
102
d
and silicon nitride films
103
a
to
103
d
are formed on the major surface of the semiconductor substrate
101
, as shown in FIG.
27
.
Then, the silicon nitride films
103
a
to
103
d
are employed as masks for partially removing the semiconductor substrate
101
by anisotropic etching, thereby forming the trenches
104
a
to
104
c
as shown in FIG.
28
. These trenches
104
a
to
104
c
are set at a depth capable of electrically isolating elements in the element forming regions from each other. For example, it is inferred that the depth of such trenches is not more than about 0.35 &mgr;m in a DRAM (dynamic random access memory) having a storage capacity of at least
1
gigabyte (G).
After formation of the trenches
104
a
to
104
c
, the surface portions of the semiconductor substrate
101
located in the trenches
104
a
to
104
c
may have defects resulting from the aforementioned anisotropic etching. In order to remove such defects, the surface portions of the semiconductor substrate
101
located in the trenches
104
a
to
104
c
may be thermally oxidized and thereafter partially removed with an HF solution. Alternatively, the surface portions of the semiconductor substrate
101
located in the trenches
104
a
to
104
c
may be removed by isotropic etching, or the semiconductor substrate
101
may be heat-treated, in order to remove the aforementioned defects.
Then, the surface portions of the semiconductor substrate
101
located in the trenches
104
a
to
104
c
are thermally oxidized, thereby forming the thermal oxide films
105
a
to
105
c
, as shown in FIG.
29
. Then, an oxide film
113
is deposited on the silicon nitride films
103
a
to
103
d
and in the trenches
104
a
to
104
c
by CVD.
Then, the oxide film
113
is partially removed by anisotropic etching, thereby obtaining a structure shown in FIG.
30
.
Then, the silicon nitride films
103
a
to
103
d
and the thermal oxide films
102
a
to
102
d
are removed from the major surface of the semiconductor substrate
101
by etching, thereby obtaining the structure shown in FIG.
26
. The conventional trench isolation oxide films
113
a
to
113
c
are formed in this method.
Higher integration and refinement are increasingly required to semiconductor devices in recent years, particularly in semiconductor memory devices such as DRAMs. Therefore, the widths W
1
of the trench isolation oxide films
113
a
,
113
b
and
113
c
shown in
FIG. 26
must be further reduced. For example, it is predicted that the widths W
1
of such trench isolation oxide films
113
a
,
113
b
and
113
c
are about 0.1 to 0.2 &mgr;m in a 1-gigabyte DRAM.
When the widths W
1
of the trench isolation oxide films
113
a
,
113
b
and
113
c
are reduced, however, a part of the oxide film
113
formed in the trench
104
c
and on the silicon nitride films
103
c
and
103
d
by CVD may come into contact with an upper portion of the trench
104
c
to close its opening and define a void
114
in the trench
104
c
before filling up the same, as shown in FIG.
31
. Such a void
114
formed in the trench isolation oxide film
104
c
deteriorates the isolation property thereof, leading to insufficient electric isolation between the elements formed on the surface of the semiconductor substrate
101
. This results in a problem such as a malfunction of the semiconductor device.
In order to fill up narrow trenches with an oxide film while forming no void, proposed is a method of forming trench isolation oxide films through deposition such as HDP-CVD (high density plasma CVD) simultaneously progressing deposition and etching of an oxide film.
FIG. 32
is a sectional view showing trench isolation oxide films formed by HDP-CVD. Referring to
FIG. 32
, trenches
124
a
to
124
c
are formed on a major surface of a semiconductor substrate
101
. Thermal oxide films
105
a
to
105
c
are formed on surface portions of the semiconductor substrate
101
located in the trenches
124
a
to
124
c
respectively. Silicon oxide films
115
a
to
115
c
are formed by HDP-CVD, to fill up the trenches
124
a
to
124
c
respectively. The width W
2
of the trenches
124
a
to
124
c
is set at 0.25 &mgr;m, and the interval W
3
between the trenches
124
a
to
124
c
is set at 0.55 &mgr;m.
FIG. 33
is a sectional view for illustrating a method of forming the trench isolation oxide films shown in
FIG. 32
by HDP-CVD. With reference to
FIG. 33
, the method of forming the trench isolation oxide films by HDP-CVD is now described.
First, thermal oxide films
102
a
to
102
d
(see
FIG. 33
) and silicon nitride films
103
a
to
103
d
(see
FIG. 33
) are formed on the major surface of the semiconductor substrate
101
(see FIG.
33
), and the trenches
124
a
to
124
c
are formed on the semiconductor substrate
101
, through steps similar to those shown in
FIGS. 27 and 28
.
Then, the thermal oxide films
105
a
to
105
c
(see
FIG. 33
) are formed on the surface portions of the semiconductor substrate
101
located in the trenches
124
a
to
124
c
respectively. Then, a silicon oxide film
115
is formed in the trenches
124
a
to
124
c
and on the silicon nitride films
103
a
to
103
d
by HDP-CVD, as shown in FIG.
33
.
At this time, the silicon oxide film
115
is deposited in the trenches
124
a
to
124
c
and simultaneously partially sputter-etched on upper portions of the trenches
124
a
to
124
c
. Therefore, the parts of the silicon oxide film
115
do not come into contact with the upper portions of the trenches
124
a
to
124
c
to close the openings thereof, dissimilarly to the general step of forming the silicon oxide film by the CVD. Parts of the silicon oxide film
115
deposited on the silicon nitride films
103
a
to
103
d
are formed to have side surfaces inclined at an angle of about 45°, since corner portions of the silic

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