Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature
Reexamination Certificate
2001-12-06
2004-04-20
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having substrate registration feature
C438S462000, C438S975000
Reexamination Certificate
active
06723614
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to semiconductor devices and manufacturing methods thereof, and more particularly, to a semiconductor device which permits the area occupied by positional detection marks or the like to be reduced and a manufacturing method thereof.
2. Description of the Background Art
In conventional manufacturing processes of semiconductor devices, positional detection marks are used in order to improve the positional precision of circuit patterns transferred by means of photolithography.
FIG. 25
is a cross sectional view of a semiconductor device having conventional positional detection marks. Referring to
FIG. 25
, such a conventional semiconductor device will be described.
Referring to
FIG. 25
, the conventional semiconductor device includes a semiconductor substrate
101
, first to third interlayer insulating films
102
,
108
and
110
, and a positional detection mark
112
. First interlayer insulating film
102
is formed on a main surface of semiconductor substrate
101
. Second interlayer insulating film
108
is formed on first interlayer insulating film
102
. Third interlayer insulating film
110
is formed on second interlayer insulating film
108
. Grooves
111
a
to
111
h
serving as positional detection mark
112
are formed on the surface of third interlayer insulating film
110
. Positional detection mark
112
is used as an alignment mark in the process of photolithography to an aluminum film or the like formed on third interlayer insulating film
110
. Note that, in a region not shown in
FIG. 25
, elements such as transistors and interconnections are formed depending upon the function of the semiconductor device.
Herein, grooves
111
a
to
111
h
serving as positional detection mark
112
are simultaneously formed in the process of forming in the process of forming through holes in third interlayer insulating film
110
. More specifically, in the process of photolithography for through holes formed in third interlayer insulating film
110
, a resist pattern is formed on the region to form positional detection mark
112
in third interlayer insulating film
110
. In the process of anisotropic etching to form the through holes in third interlayer insulating film
110
, a part of third interlayer insulating film
110
is used, using the resist pattern as a mask, and grooves
111
a
to
111
h
result.
As shown in
FIG. 25
, conventionally, in the region positioned under positional detection mark
112
, positional detection marks or interconnections are not formed in the process of forming elements on the first or second interlayer insulating film. This is for the purpose of preventing errors in positional detection. More specifically, normally, light is directed to positional detection mark
112
and light reflected therefrom is used for detection of the mark. If structures such as interconnections are present in the underlying layer of positional detection mark
112
, the light for detecting positional detection mark
112
could reach such structures through first to third interlayer insulating films
102
,
108
and
111
. Then, these structures cause the light for detecting positional detection mark
112
to scatter, which impedes the accurate detection of positional detection mark
112
. In order to prevent this problem, structures such as interconnections or positional detection marks are not conventionally formed in the underlying layer of positional detection mark
112
.
Meanwhile, as semiconductor devices have become more highly integrated and complicated, layered structures are employed for the devices. Thus, a positional detection mark is necessary for each layer. As shown in
FIG. 25
, however, only one positional detection mark may be formed at one position, and therefore the area occupied by positional detection marks increase as the number of layers increases.
One method of manufacturing a semiconductor device to solve this disadvantage is disclosed by Japanese Patent Laying-Open No. 2-229419, wherein positional detection marks in different layers are formed at the same position so as to overlap two-dimensionally. In the disclosed semiconductor device, however, errors or the like in the manufacturing process during forming positional detection marks cause positional detection marks to be erroneously recognized as is the case with the above conventional case, if the positions of positional detection marks in the upper and lower layers are even slightly shifted from each other.
Another method of manufacturing a semiconductor device, proposed in order to solve the above-described disadvantage is disclosed by Japanese Patent Laying-Open No. 3-177013, wherein a light beam for detecting a positional detection mark is obliquely irradiated and only the positional detection mark in a layer of interest is detected. By this method, however, other positional detection marks formed in the underlying layers of a positional detection mark to be detected are also recognized through the interlayer insulating film as is the case with the above conventional method, and it was difficult to completely prevent the erroneous detection of positional detection marks in the underlying layers.
In the conventionally proposed semiconductor devices including positional detection marks, the influence of other positional detection marks formed in the underlying layer of a positional detection mark of interest cannot be eliminated, and it was difficult to form positional detection marks in a layered manner while preventing erroneous recognition of such positional detection marks.
Referring to
FIG. 26
, a conventional semiconductor device includes a semiconductor substrate
101
, an interlayer insulating film
102
, a bonding pad
134
a,
and a glass coat
135
. Interlayer insulating film
102
is formed on semiconductor substrate
101
. Bonding pad
134
a
is formed on interlayer insulating film
102
. Glass coat
135
is formed on interlayer insulating film
102
and bonding pad
134
a,
and has an opening in the region positioned on bonding pad
134
a.
As shown in
FIG. 26
, in the region positioned under bonding pad
134
a
serving as an external electrode for the semiconductor device, conventionally, no such structure as interconnections is formed. This is because the insulation property of interlayer insulating film
102
could deteriorate by damages such as cracks made in interlayer insulating film
102
under bonding pad
134
a,
at the time of thermo-compression bonding of an interconnection of gold or the like to bonding pad
134
a.
If the insulation property of interlayer insulating film
102
thus deteriorates, and an interconnection is formed under bonding pad
134
a,
the interconnection and bonding pad
134
a
could be short-circuited, which causes the erroneous operations of the semiconductor device.
Thus, conventionally, in the region positioned under positional detection mark
112
(see
FIG. 25
) or under bonding pad
134
a
(see FIG.
26
), no structure such as interconnections is formed, in other words, the region is a so-called dead (unused) space. However, today, as semiconductor devices are to be more miniaturized and highly integrated, there arises a need to efficiently use such unused spaces.
SUMMARY OF THE INVENTION
It is one object of the invention to provide a semiconductor device which permits effective use of a region positioned under positional detection marks or external electrodes, in other words, the region which has not been conventionally used.
Another object of the invention is to provide a method of manufacturing a semiconductor device which permits effective use of a region positioned under positional detection marks and external electrodes, in other words, the region which has not been conventionally used.
A semiconductor device according to one aspect of the present invention includes a lower layer, a shielding film, and an upper layer. The lower layer includes at least one selected from the group consisting of a positional detection mark, a quality t
Perkins Pamela E
Renesas Technology Corp.
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