Semiconductor device comprising chip on chip structure

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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Details

C257S686000, C257SE23001

Reexamination Certificate

active

07741723

ABSTRACT:
In a semiconductor device constituted of stacked semiconductor chips, in order to independently test each of the chips, a second chip is disposed to face a first chip, with a second interconnection terminal thereof connected to a first interconnection terminal of the first chip. First and second external terminals of the first and second chips are formed on surfaces of the first and second chips, the surface being on a same side of the first and second chips. Therefore, even after the first chip and the second chip are pasted together, it is possible to test the first chip and the second chip while operating them independently. Further, since test probes or the like can be brought into contact with the external terminals of the first chip and the second chip from the same side, it is possible to simultaneously test the first chip and the second chip.

REFERENCES:
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patent: 2004/0201090 (2004-10-01), Aigner et al.
patent: 2005/0156616 (2005-07-01), Morishita et al.
patent: 2006/0050454 (2006-03-01), Koudate et al.
patent: 2006/0220256 (2006-10-01), Shim et al.
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patent: 2005-039160 (2005-02-01), None
patent: 2005-039161 (2005-02-01), None
patent: 2005-109419 (2005-04-01), None
patent: WO 01/73843 (2001-10-01), None

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