Semiconductor device comprising a perforated metal silicide laye

Fishing – trapping – and vermin destroying

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357 4, 357 22, 357 34, 437111, 437178, 437179, 437201, 437202, 437DIG142, 437DIG147, H01L 2948, H01L 2124

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active

049011219

ABSTRACT:
A method for producing, without etching, a perforated layer of epitaxial metal silicide, especially CoSi.sub.2, on a single crystal Si substrate, with epitaxial Si overlying the silicide layer. The layer thickness, and the number and size of the openings in the layer are such as to make the structure suitable as an electronic device, in particular, as a permeable base transistor. The number and/or size of the openings is a function of processing parameters such as the substrate orientation, the annealing temperature of the film, or the Co/Si ratio of the deposited material. A device comprising a perforated silicide layer is also disclosed.

REFERENCES:
patent: 4378629 (1983-04-01), Bozler et al.
patent: 4488038 (1984-12-01), Harrison
patent: 4492971 (1985-01-01), Bean et al.
Bozler et al., IEEE Transactions on Electron Devices, vol. ED--27, No. 6 (Jun. 1980), pp. 1128-1141.
Extended Abstracts of the 15th Conference on Solid State Devices and Materials, Tokyo, (1983), "Study on Formation of Solid-Phase-Epitaxial CoSi.sub.2 Films and Patterning Effects", Ishibashi et al., pp. 11-14.
Proceedings of the 2nd International Symposium on Molecular Beam Epitaxy, Tokyo, (1982), "Low-Temperature Surface Cleaning of Silicon and its Application to Silicon MBE", Ishizaka et al., pp. 183-186.
Japanese Journal of Applied Physics, vol. 23, No. 7, (Jul. 1984), "Formation of Embedded Monocrystalline NiSi.sub.2 Grid Layers in Silicon by MBE", Ishazaka et al., pp. L499-L501.
IEEE Transactions on Electron Devices, vol. ED-27, No. 6, (Jun. 1980), "Fabrication and Numerical Simulation of the Permeable Base Transistor", Bozler et al., pp. 1128-1141.
Proceedings of the IEEE, vol. 52, (Dec. 1964), "The Metal-Gate Transistor", Lindmayer, p. 1751.

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