Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Integrated structure
Patent
1994-11-14
1996-09-17
Nelms, David C.
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
Integrated structure
327565, 326101, H01L 2500
Patent
active
055572359
ABSTRACT:
In a semiconductor device comprising on a semiconductor substrate (41) first and second input buffers (21), first and second input signal connections (25) supplying the input buffers from input signal pads (23) with input signals, respectively, each with a buffer input level, and first and second reference signal connections (29) supplying a reference signal from a reference signal pad (27) to the input buffers with buffer reference levels, respectively, a grounding pad (71) is laid near the reference signal pad and supplied with a ground level for the semiconductor device with a capacitor (73) connected between the semiconductor substrate and each reference signal connection near the reference signal pad and preferably with the reference signal connections laid geometrically parallel to the input signal connections. If lengthy, each reference signal connection comprises a first part laid parallel to a pertinent one of the input signal connections between a relevant one of the input buffers and a node (69) and a second part extended from the node to the reference signal pad. Each input buffer can produce an output signal of a CMOS level when each input signal connection is supplied with a relevant one of the input signals with a TTL level. Preferably, each input buffer comprises a current mirror circuit for cancelling a variation in the buffer input signal and a variation in a relevant one of the buffer reference level with each other. The capacitor has a capacitance given by a gate capacitance of an MOS transistor.
REFERENCES:
patent: 4278897 (1981-07-01), Ohno et al.
patent: 4786828 (1988-11-01), Hoffman
patent: 4827368 (1989-05-01), Suzuki et al.
patent: 4926066 (1990-05-01), Maini et al.
patent: 5043597 (1991-08-01), Furuyama et al.
Patent Abstracts of Japan, JPA-63 052464, Mar. 5, 1988, vol. 012, No. 268 (E-638).
Patent Abstracts of Japan, JPA 01 065864, Jun. 26, 1989, vol. 013, No. 277 (E-778).
Patent Abstracts of Japan, JPA 59 169166, Sep. 25, 1984, vol. 009, No. 023 (E-293).
NEC Corporation
Nelms David C.
Phan Trong
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