Semiconductor device capable of shortening test time and...

Details Semiconductor device capable of shortening test time and... Semiconductor device capable of shortening test time and...

2005-11-08

2005-11-08

Nguyen, Ha (Department: 2812)

Semiconductor device manufacturing: process

With measuring or testing

Reexamination Certificate

active

06962827

ABSTRACT:
A plurality of semiconductor integrated circuits and a plurality of TEG circuits are aligned and provided on a substrate. In the TEG circuit, a built-in test circuit is provided in a region which faces a semiconductor integrated circuit across a dicing line region. The built-in test circuit and the semiconductor integrated circuit are connected by an interconnection which is provided on the dicing line region. The interconnection is cut for isolation into chips.

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patent: 6001662 (1999-12-01), Correale et al.
patent: 2004/0266036 (2004-12-01), Cram
patent: 4-152543 (1992-05-01), None

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