Semiconductor device capable of reducing a clock skew in a plura

Details Semiconductor device capable of reducing a clock skew in a plura Semiconductor device capable of reducing a clock skew in a plura

1994-02-15

1996-05-28

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

327292, 327293, 327565, 257786, 257208, H03K 19003

Patent

active

055215416

ABSTRACT:
In a semiconductor device including a clock driver which provides clock signals, a plurality of electronic elements which are operable in timed relation to the clock signals, are provided a plurality of circumferentially-wired, lattice-shaped wiring blocks to which the electronic elements are connected and each of which has a center portion, and an interconnecting wiring pattern connected to the center portion. The interconnecting wiring pattern connects the clock driver with the center portion of each circumferentially-wired, lattice-shaped wiring block so that a distance between the clock driver and each center portion is substantially equal to one another in the center portions.

REFERENCES:
patent: 5109168 (1992-04-01), Rusu
patent: 5122693 (1992-06-01), Honda et al.
patent: 5140184 (1992-08-01), Hamamoto et al.
patent: 5239215 (1993-08-01), Yamaguchi
patent: 5394490 (1995-02-01), Kato et al.

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