Semiconductor device capable of correcting time stamp and...

Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels

Reexamination Certificate

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Details

C370S516000

Reexamination Certificate

active

07319704

ABSTRACT:
A device capable of correcting time stamp value according to an embodiment of the present invention including an original time counter configured to generate and output an original time value, a subtracter configured to receive a network time value from the outside and the original time value from the original time counter, subtract the original time value from the network time value, and output the difference as a cycle-time difference value, and a first adder configured to receive an original time-stamp value generated from the original time value and the cycle-time difference value from the subtracter, add the cycle-time difference value to the original time-stamp value, and output the sum as a time-stamp value.

REFERENCES:
patent: 6661811 (2003-12-01), Baker
patent: 7035272 (2006-04-01), Nomura
patent: 10-509294 (1998-09-01), None
patent: 11-261579 (1999-09-01), None
patent: 11-289320 (1999-10-01), None
patent: 11-317748 (1999-11-01), None
patent: 2000-332798 (2000-11-01), None
Official Action Letter dated Apr. 19, 2005 corresponding to the counterpart Japanese Patent Application No. 2002-288101 and an English Translation thereof.

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