Semiconductor device based on Si-Ge with high stress liner...

Details Semiconductor device based on Si-Ge with high stress liner... Semiconductor device based on Si-Ge with high stress liner...

2006-05-30

2006-05-30

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Thin active physical layer which is

Heterojunction

C257S018000

Reexamination Certificate

active

07053400

ABSTRACT:
The carrier mobility in transistor channel regions of Si—Ge devices is increased by employing a stressed liner. Embodiments include applying a high compressive or tensile stressed film overlying relaxed source/drain regions. Other embodiments include applying a high compressively or high tensilely stressed film, after post silicide spacer removal, over gate electrodes and strained Si source/drain regions of P-channel or N-channel transistors, respectively.

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Semiconductor one source definition of silicide and silicidation from semiconductorglossary.com.
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S. Thompson et al., “A 90nm Logic TechnologyFeaturing 50nm Strained Silicon Channel Transistors, 7 Layers of Cu Interconnects, Low K 1LD, and 1/spl mu/m <2>. SRAM Cell”, International Electron Devices Meeting 2002. IEDM Technical Digest, San Francisco, CA, Dec. 8-11, 2002, New York, NY: IEEE, US, Dec. 8, 2002, pp. 61-64, XP010625990.

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