Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Non-heterojunction superlattice
Patent
1993-05-20
1995-04-18
Ngo, Ngan V.
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Non-heterojunction superlattice
257 17, 257 22, 257 39, 257183, 257655, H01L 2712, H01L 4800, H01L 4902
Patent
active
054081076
ABSTRACT:
Heterostructure barrier quantum well device with a super-lattice structure of alternating lightly doped and heavily doped spacer layers having multiple, stable current-voltage curves extending continuously through zero bias at ambient temperature. The device can be repetitively switched between the multiple current-voltage curves. Once placed on a particular curve, the device retains memory of the curve it has been set on, even if held at zero bias for extended periods of time. The device can be switched between current-voltage curve settings at higher positive or negative voltages and can be read at lower voltages. Switching between current-voltage curve settings can also be effected by additional terminal connection(s) to the spacer layer(s).
REFERENCES:
patent: 4785340 (1988-11-01), Nakagawa et al.
patent: 4800262 (1989-01-01), Lentine
patent: 4849934 (1989-07-01), Yokoyama et al.
patent: 4853753 (1989-08-01), Capasso et al.
patent: 4855797 (1989-08-01), Kohn et al.
patent: 4902912 (1990-02-01), Capasso et al.
patent: 4922314 (1990-05-01), Shannon
patent: 5017973 (1991-05-01), Mizuta et al.
patent: 5093699 (1992-03-01), Weichold et al.
patent: 5128894 (1992-07-01), Lin
S. Luryi, A. Kastalsky, A. C. Gossard and R. Hendel, Hot-electron memory effect in double-layered heterostructures, pp. 1294-1296.
M. R. Melloch, Q-D. Quian and J. A. Cooper, Jr., Effect of a buried superlattice on the dynamic storage of electrons at the AlGaAs/GaAs heterojunction, pp. 1657-1659.
A. C. Campbell, V. P. Kesan, G. E. Crook, C. M. Maziar, D. P. Neikirk and B. G. Streetman, Impedance Switching Effects in GaAs/AlAs Barrier Structures, pp. 926-927.
Susanta Sen, Federico Capasso, Alfred Y. Cho and Debbie Sivco, Resonant Tunneling Device with Multiple Negative Differential Resistance: Digital and Signal Processing Applications with Reduced Circuit Complexity, pp. 2185-2191.
Jan Soderstrom and Thorwald G. Anderson, A Multiple-State Memory Cell Based on the Resonant Tunneling Diode, pp. 200-202.
Robert C. Potter, Amir A. Lakhani, Dana Beyea, Harry Hier, Erica Hempfling and Ayub Fathimulla, Three-dimensional integration of resonant tunneling structures for signal processing and three-state logic, pp. 2163-2164.
T. Tanoue, H. Mitzuta and S. Takahashi, A Triple-Well Resonant-Tunneling Diode for Multiple-Valued Logic Application, pp. 365-367.
Susanta Sen, Federico Capasso, Debbie Sivco and Alfred Y. Cho, New Resonant-Tunneling Devices with Multiple Negative Resistance Regions and High Room-Temperature Peak-to-Valley Ratio, pp. 402-404.
Robert C. Potter, Amir A. Lakhani and Harry Hier, Three and six logic states by the vertical integration of InAlAs/InGaAs resonant tunneling structures, pp. 3735-3736.
A. C. Campbell, V. P. Kesan, T. R. Block, G. E. Crook, D. P. Neikirk and B. G. Streetman, Influence MBE Growth Temperature on GaAs/AlAs Resonant Tunneling Structures, pp. 585-588.
Federico Capasso, Susanta Sen, Fabio Beltram, Leda M. Lunardi, Arvind S. Vengurlekar, Peter R. Smith, Nitin J. Shah, Roger J. Malik and Alfred Y. Cho, Quantum Functional Devices: Resonant-Tunneling Transistors, Circuits with Reduced Complexity, and Multiple-Valued Logic, pp. 2065-2082.
Ming C. Wu and W. T. Tsang, Quantum-switched heterojunction bipolar transistor, pp. 1771-1773.
Fabio Beltram, Federico Capasso, John F. Walker and Roger J. Malik, Memory Phenomena in Novel Floating-Gate GaAs/AlGaAs Structures with Graded Gap Injector, pp. 293-296.
J. W. Pabst, T. E. Dungan, J. A. Cooper, Jr. and M. R. Melloch, Ion-Implanted p-n Junction Capacitors for GaAs DRAM's, pp. 804-806.
J. Chen, C. H. Yang, R. A. Wilson and C. E. C. Wood, Single transistor static memory cell: Circuit application of a new quantum transistor, pp. 96-98.
Gullapalli Kiran K.
Neikirk Dean P.
Grether Heinz D.
Keys Jerry M.
Ngo Ngan V.
The Board of Regents of the University of Texas System
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