Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2003-03-12
2004-03-23
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S272000, C257S277000, C257S296000
Reexamination Certificate
active
06710426
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device provided with an active element and a passive element, suitable for use in performing, for example, signal processing on microwave or millimeter wave signals. The invention also relates to a transceiver apparatus using this type of semiconductor device.
2. Description of the Related Art
A known type of semiconductor device is a monolithic microwave integrated circuit (MMIC), in which active elements, such as transistors, and passive elements, such as resistor elements, capacitor elements, and inductor elements, are monolithically formed on the same semiconductor substrate (see, for example, “Monolithic Microwave Integrated Circuit” edited by The Institute of Electronics, Information and Communication Engineers, Corona Publishing Co., Ltd. published on Jan. 25, 2003.)
In this known art, active elements and passive elements are simultaneously and integrally formed on a semiconductor substrate formed of, for example, gallium arsenide (GaAs) or silicon (Si), according to a semiconductor manufacturing process.
In a semiconductor device formed by the above-described known technique, active elements, passive elements, and wiring patterns for connecting these elements are integrally formed on an expensive semiconductor substrate formed of, for example, GaAs. Accordingly, the chip size of the resulting MMIC becomes large, thereby increasing the manufacturing cost.
All the elements formed on the semiconductor device are used for specific applications, and the resulting MMIC is restricted to such specific applications. Because of this low general versatility, such MMICs cannot be mass-produced, thereby making it difficult to achieve a cost reduction.
Additionally, all the elements are integrally formed on a semiconductor substrate as described above. It is thus necessary to design the overall circuit according to a particular application, thereby prolonging the design period.
SUMMARY OF THE INVENTION
Accordingly, in view of the above-described problems unique to the related art, the present invention provides a semiconductor device and a transceiver apparatus having high general versatility and a lower manufacturing cost.
In order to achieve the above-described advantages, the present invention provides a semiconductor device including a field effect transistor (FET), and a drain terminal, a source terminal, and a gate terminal, all of which are connected to the FET. A metal insulator metal (MIM) capacitor, which is formed by sandwiching a thin-film dielectric member between metallic layers, is connected in series between the FET and at least one of the drain terminal, the source terminal, and the gate terminal. The MIM capacitor blocks DC bias components, and self-resonates in a desired frequency range of a high frequency signal. A bias terminal is connected between the MIM capacitor and the FET. A passive element is connected to at least one of the drain terminal, the source terminal, and the gate terminal. The FET, the drain terminal, the source terminal, the gate terminal, the MIM capacitor, and the bias terminal are disposed on a semiconductor substrate, and the passive element is disposed on a dielectric substrate.
With this configuration, only the FET, which is an active element, and the drain terminal, the source terminal, the gate terminal, the bias terminal, and the MIM capacitor are disposed on the semiconductor substrate, and the other elements, i.e., the passive elements, can be eliminated from the semiconductor substrate. This makes it possible to simplify the circuitry on the semiconductor substrate. The general versatility of the semiconductor device can be increased, and the size of the semiconductor device can be reduced, thereby decreasing the manufacturing cost.
In this case, the MIM capacitor may be connected in series between the FET and the drain terminal. With this arrangement, since the bias terminal is connected between the FET and the MIM capacitor connected to the drain terminal, a bias voltage can be applied to the drain of the FET via the bias terminal.
Alternatively, the MIM capacitor may be connected in series between the FET and each of the drain terminal and the gate terminal. In this case, a bias terminal is connected between the FET and the MIM capacitor connected to the drain terminal, and another bias terminal is connected between the FET and the MIM capacitor connected to the gate terminal. Accordingly, a bias voltage can be applied to the drain or the gate of the FET via the corresponding bias terminal.
Alternatively, the MIM capacitor may be connected in series between the field effect transistor and each of the drain terminal and the source terminal. In this case, a bias terminal is connected between the FET and the MIM capacitor connected to the drain terminal, and another bias terminal is also connected between the FET and the MIM capacitor connected to the source terminal. Accordingly, a bias voltage can be applied to the drain or the source of the FET via the corresponding bias terminal.
Alternatively, the MIM capacitor may be connected in series between the FET and each of the source terminal and the gate terminal. In this case, a bias terminal is connected between the FET and the MIM capacitor connected to the source terminal, and another bias terminal is also connected between the FET and the MIM capacitor connected to the gate terminal. Accordingly, a bias voltage can be applied to the source or the gate of the FET via the corresponding bias terminal.
Alternatively, the MIM capacitor may be connected in series between the FET and each of the drain terminal, the source terminal, and the gate terminal.
In this case, a bias terminal is connected between the FET and the MIM capacitor connected to each of the drain terminal, the source terminal, and the gate terminal. Accordingly, a bias voltage can be applied to the drain, the source, or the gate of the FET via the corresponding bias terminal.
The dielectric constant of the dielectric substrate may be set to be higher than that of the semiconductor substrate. With this arrangement, a passive element including a capacitor formed on the dielectric substrate can be made smaller than that formed on the semiconductor substrate, thereby reducing the size of the overall device.
The invention further relates to a semiconductor device including a transistor having a control electrode and a pair of main electrodes. The transistor may be a field effect transistor (FET) and the control and main electrodes may correspond to the gate, source, and drain of the FET, respectively. A control terminal and a pair of main terminals are connected respectively to the control and main electrodes of the transistor. A metal-insulator-metal (MIM) capacitor is connected in series between at least one of the main and control electrodes and the corresponding terminal. A bias terminal is connected between the MIM capacitor and the transistor. A passive element is connected to at least one of the control and main terminals. The MIM capacitor blocks DC bias components, and self-resonates in a desired frequency range of a high frequency signal. The transistor, the control and main terminals, the MIM capacitor, and the bias terminal are disposed on a semiconductor substrate, and the passive element is disposed on a dielectric substrate.
The present invention also provides a transceiver apparatus utilizing the aforementioned semiconductor device.
REFERENCES:
patent: 6472738 (2002-10-01), Suzuki
patent: 2002/0117696 (2002-08-01), Hirai et al.
patent: 5251629 (1993-09-01), None
patent: 669416 (1994-03-01), None
patent: 10294421 (1998-11-01), None
patent: 200068762 (2000-03-01), None
patent: 2001244710 (2001-09-01), None
patent: 200243812 (2002-02-01), None
Nakao Motoyasu
Sasabata Akihiro
Murata Manufacturing Co. Ltd.
Ngo Ngan V.
Ostrolenk Faber Gerb & Soffen, LLP
LandOfFree
Semiconductor device and transceiver apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and transceiver apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and transceiver apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3262444