Semiconductor device and semiconductor chip

Details Semiconductor device and semiconductor chip Semiconductor device and semiconductor chip

2000-03-15

2001-12-11

Paschall, M H (Department: 3742)

Electric heating

Heating devices

With power supply and voltage or current regulation or...

C219S492000, C219S501000, C324S755090, C324S760020

Reexamination Certificate

active

06329642

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor devices and semiconductor chips, and particularly, to a semiconductor device or a semiconductor chip having an operation securing circuit for controlling the temperature of hard macro cores contained in the semiconductor device or chip and securing a wide operating temperature range for the semiconductor device or chip.
2. Description of the Related Art
Digital consumer products such as digital cameras have a variety of functions such as image and voice processing functions, and therefore, they must have processing capacity comparable to personal computers. In addition, the digital consumer products are required to be compact, portable, low power consumption, and manufacturable at low cost. To meet these requirements, there are techniques to arrange integrated circuits having different functions on a single semiconductor chip to provide a one-chip system LSI. Such an LSI satisfies a variety of requirements and provides improved processing capacity.
The one-chip system LSI consists of different hard macro cores or functional blocks including microprocessors, digital signal processors, flash memories, static RAMS, and dynamic RAMS. To make the designing of system LSIs easier, a library is prepared to store data such as delay times and operating temperature ranges related to hard macro cores. Data about necessary hard macro cores is picked up from the library when designing a required system LSI.
The hard macro cores consist each of cells and have different operating temperature ranges. Accordingly, a system LSI consisting of different hard macro cores is designed to have an operating temperature range that is of a hard macro core having a narrowest operating temperature range. Namely, the lowest operating temperature of a system LSI is equal to a highest lower limit among the operating temperature ranges of hard macro cores contained in the system LSI. Similarly, the highest operating temperature of the system LSI is determined by a lowest higher limit among the operating temperature ranges of the hard macro cores. For example, a system LSI consisting of a hard macro core A having an operating temperature range of −10° C. to 80° C. and a hard macro core B having an operating temperature range of −40° C. to 60° C. assures an operating temperature range of −10° C. to 60° C. It is difficult for this system LSI to expand the operating temperature range while maintaining the operating temperature range of each hard macro core contained in the system LSI.
The operating temperature ranges of hard macro cores are usually dependent on periods they were developed, or on customers' requests. If a system LSI is made of a mixture of hard macro cores having different operating temperature ranges, the operating temperature range of the system LSI is restricted by the hard macro core that has the narrowest operating temperature range. To expand the operating temperature range of such a system LSI, the operating speed thereof must be sacrificed.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device or chip capable of securing an operating temperature range that is wider than the operating temperature ranges of individual hard macro cores contained in the semiconductor device or chip.
Another object of the present invention is to provide a semiconductor device or chip incorporating hard macro cores having different cell arrangements, capable of securing a wide operating temperature range and specified operating speed.
Still another object of the present invention is to provide a semiconductor device capable of correctly grasping a temperature by arranging an oscillator close to a hard macro core that is susceptible to temperature.
Still another object of the present invention is to provide a semiconductor device or chip having a frequency tester that is designed to a customer's operating temperature range.
Still another object of the present invention is to provide a semiconductor device having a heater capable of properly heating a hard macro core.
Still another object of the present invention is to provide a semiconductor device capable of automatically starting o n at a specified operating speed even at a temperature that is below the operating temperature range of a hard macro core contained in the semiconductor device.
In order to accomplish the objects, a first aspect of the present invention provides a semiconductor device having an operation securing circuit. The operation securing circuit has an oscillator for generating an oscillating signal whose frequency is dependent on temperature, a frequency tester for determining whether or not the frequency of the oscillating signal is normal, a heater for generating heat if the frequency tester determines that the frequency is abnormal, and a first hard macro core that is shifted to a normal operation mode if the frequency tester determines that the frequency is normal. The oscillator, heater, and first hard macro core are put under the same temperature condition. The frequency tester employs a lower limit of an operating temperature range of the first hard macro core as a reference to determine whether or not the frequency of the oscillating signal is normal. Frequencies determined to be normal by the frequency tester correspond to temperatures under which the first hard macro core normally operates, and frequencies determined to be abnormal by the frequency tester correspond to temperatures under which the first hard macro core malfunctions. The operating temperature range of a hard macro core is dependent on an arrangement of cells in the hard macro core. Namely, hard macro cores having different cell arrangements have different operating temperature ranges.
If temperature decreases below the lower limit of the operating temperature range of the first hard macro core, the frequency tester determines that the frequency of the oscillating signal generated by the oscillator that is under the same temperature condition as the first hard macro core is abnormal, to start the heater that is also under the same temperature condition as the first hard macro core. This increases the temperature of the first hard macro core and oscillator to a temperature in the operating temperature range of the first hard macro core. Then, the frequency tester detects a normal frequency, to shift the first hard macro core to a normal operation mode. In this way, the first aspect of the present invention heats the first hard macro core above the lower limit of the operating temperature range thereof, so that the hard macro core may normally operate even in an ambient temperature that is below the operating temperature range thereof.
Consequently, the semiconductor device of the first aspect is capable of securing a wide operating temperature range, automatically starting operation at a specified operating speed even in a low ambient temperature, and expanding the degree of freedom in designing due to the wide operating temperature range that is secured without extending delay time.
The frequency tester of the operation securing circuit has a counter for measuring the frequency of the oscillating signal generated by the oscillator, a testing unit for determining whether or not the measured frequency is normal and providing a test result signal, and a heater controller for turning on the heater if the test result signal indicates that the measured frequency is abnormal and turning off the heater if it indicates that the measured frequency is normal. The oscillator, heater, and first hard macro core may be arranged on a fist semiconductor chip, so that they are put under the same temperature condition. This arrangement makes the semiconductor device compact The frequency tester may be arranged on a second semiconductor chip that is different from the first semiconductor chip. The semiconductor device may have a second hard macro core. The second hard macro core is arranged on the fist semiconductor ch

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