Radiant energy – Invisible radiant energy responsive electric signalling – Semiconductor system
Reexamination Certificate
2001-06-26
2003-07-29
Hannaher, Constantine (Department: 2878)
Radiant energy
Invisible radiant energy responsive electric signalling
Semiconductor system
C250S370090, C250S370140, C257S059000, C257S072000, C257S443000, C257S448000, C349S042000, C349S046000, C438S057000, C438S066000, C438S073000
Reexamination Certificate
active
06600157
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a liquid crystal panel, a radiation detection device and a radiation detection system that use TFTs.
2. Related Background Art
Currently, the tendency of enlargement of the picture area of panels using thin film transistors (TFTs) has been accelerated. The tendency results from the development in manufacturing technique for liquid crystal panels using TFTs and the increase in applicability of area sensors having photoelectric conversion elements to various fields (for example, X-ray imaging apparatuses). Further, with the tendency of enlargement of the picture area, the pixel pitch becomes finer.
FIG. 5
is a schematic view showing an example of a photoelectric conversion device using a TFT matrix panel. The device consists of gate lines
53
for driving TFTS, photoelectric conversion elements
55
each consisting of a PIN-type diode, bias lines
52
, signal lines
51
and TFT sections
57
.
Carriers as generated by light incidence to the photoelectric conversion element
55
are stored, and when reading out the stored carriers, the gate line
53
is biased to effect readout. At this time, the driving speed of TFTs is limited by the resistance of the gate line
53
. Especially, with photoelectric conversion devices, there is a problem that increase of wiring resistance increases the sensor noise, in addition to limiting the response speed. This is attributable to the floating capacitance of a crossing of the gate line
53
with the bias line
52
or the signal line
51
.
Additionally, as the pixel pitch of the panels becomes finer, the aperture ratio per pixel becomes small. The reason is that in order to accomplish the finer pixel pitch while optimizing the performance of TFT as the switching element as well as the wiring resistance, it becomes necessary to reduce the electrode area of the aperture section. This will decrease the transmittance of the backlight of liquid crystal panels using TFTs to lower the luminance of the liquid crystal display. Furthermore, in an imaging device such as a photoelectric conversion device, the area of a light receiving section will be reduced to result in lowering of the sensitivity.
Therefore, in order to solve the two technical problems, it is considered that the film thickness of each wiring is increased to reduce the wiring resistance and to increase the aperture area. However, merely increasing the film thickness of the gate line
53
will deteriorate the coverage of an interlayer insulating film of a crossing of the gate line with other wirings to make it difficult to maintain the dielectric strength. Further, there is a possibility that the reduced thickness of the insulating film may increase the floating capacitance.
On the other hand, when the thickness of the insulating film is increased in order to thicken the wiring to reduce its resistance and to maintain the dielectric strength of the crossing, the driving capability of the TFTs will be lowered. Therefore, when the driving speed is to be increased, the driving voltage needs to be raised, which necessitates further increase of the dielectric strength.
Thus, the enlargement of the panels needs to reduce the resistance of a lower wiring such as the gate line, that is, a wiring located nearest to the substrate.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to increase the metal film thickness of a lower metal wiring and to reduce the wiring resistance, thereby assuring the coverage of an interlayer insulating film formed between the lower metal wiring and an upper metal wiring to secure the reliability.
According to a first aspect of the present invention, there is provided a semiconductor device comprising:
a thin film transistor (TFT) comprising a gate electrode formed on an insulating substrate, a gate insulating film formed on the gate electrode, and a pair of electrodes having a semiconductor layer and an ohmic contact layer therebetween; and
a gate wiring connected to the gate electrode, and a signal wiring connected to one of the pair of electrodes,
wherein the gate wiring and the signal wiring are arranged in superposition in the film thickness direction with an interlayer insulating layer therebetween to have a plurality of crossings with each other and the interlayer insulating layer has a plurality of steps overstriding a lower wiring at the crossings.
According to a second aspect of the present invention, there is provided a semiconductor device comprising:
a thin film transistor (TFT) comprising a gate electrode formed on an insulating substrate, a gate insulating film formed on the gate electrode, and a pair of electrodes having a semiconductor layer and an ohmic contact layer therebetween; and
a gate wiring connected to the gate electrode, and a signal wiring connected to one of the pair of electrodes,
wherein the gate wiring and the signal wiring are arranged in superposition in the film thickness direction with an interlayer insulating layer therebetween to have a plurality of crossings with each other, the interlayer insulating layer has a plurality of steps overstriding a lower wiring at the crossings, and the film thickness of the lower wiring is smaller at the crossings than at a portion thereof not crossing.
REFERENCES:
patent: 5614730 (1997-03-01), Nakazawa et al.
patent: 5726461 (1998-03-01), Shimada et al.
patent: 5981931 (1999-11-01), Kinno et al.
patent: 6239439 (2001-05-01), Itabashi et al.
patent: 6476416 (2002-11-01), Ikeda
patent: 2002/0017666 (2002-02-01), Ishii et al.
Koike Toshiko
Okada Satoshi
Watanabe Minoru
Gagliardi Albert
Hannaher Constantine
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