Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2005-03-01
2005-03-01
Kielin, Erik (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S108000, C438S109000, C438S622000, C438S623000, C438S624000
Reexamination Certificate
active
06861284
ABSTRACT:
In a semiconductor device including an insulating core substrate, a plurality of layers of wiring patterns on the core substrate and insulating layers interposed between the wiring patterns, each adjacent pair of the wiring patterns being electrically connected through a conductor portion penetrating through the insulating layer interposed between them, each of the insulating layers is formed integrally, semiconductor chips thinner than one layer of the insulating layer are mounted into at least one of the insulating layers, and the semiconductor chips are electrically connected to one layer of the wiring pattern of one insulating layer adjacent on the side of the core substrate.
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patent: 5565706 (1996-10-01), Miura et al.
patent: 6025995 (2000-02-01), Marcinkiewicz
patent: 6759268 (2004-07-01), Akagawa
Higashi Mitsutoshi
Koike Hiroko
Murayama Kei
Sakaguchi Hideaki
Kielin Erik
Paul & Paul
Shinko Electric Industries Co. Ltd.
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