Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2001-12-13
2003-04-15
Fabuml, Wael (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S124000, C438S125000, C438S126000, C438S127000, C438S612000
Reexamination Certificate
active
06548326
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a process of producing the same, and particularly, to a semiconductor device having a first electronic part and a second electronic part, the first electronic part being larger than the second electronic part in area and in the number of connection terminal pads including pad-form electrode terminals, the first and second electronic parts being disposed one upon the other with the respective pad forming surfaces facing each other, and the external connection terminals or other connection terminals being bonded to the connection terminal pads, and a process of producing the same.
2. Description of the Related Art
FIG. 16
shows a semiconductor device
100
, having two semiconductor chips
102
and
104
disposed one upon the other, which has been recently brought into practical use. The semiconductor chip
102
having a smaller area is mounted on, and bonded to, one side of the semiconductor chip
104
having a larger area.
The smaller semiconductor chip
102
has one side, or an electrode terminal forming surface, provided with electrode terminals
112
formed thereon and electrically connected, via conductor wires
110
, to connection pads
108
formed on a substrate
106
and has another side, or a surface which is opposite to the electrode terminal forming surface and is bonded to one side of the larger semiconductor chip
104
.
The larger semiconductor chip
104
has one side bonded to the smaller semiconductor chip
102
and provided with electrode terminals
114
formed thereon and electrically connected, via conductor wires
110
, to connection pads
108
formed on the substrate
106
and has another side bonded to one side of the substrate
106
on which side connection pads
108
are formed.
The substrate
106
has the other side provided with external connection terminals or bumps
116
to be connected to connection pads of a motherboard.
The device
100
having the semiconductor chips
102
and
104
on the substrate is sealed or packaged with a sealing or packaging resin
118
to form a package.
The semiconductor device
100
shown in
FIG. 16
advantageously provides an electronic system having an improved operating speed and performance in comparison with a system assembled of separate semiconductor packages having respective semiconductor chips
102
and
104
, because not only is the delay of the signal transfer between chips
102
and
104
significantly mitigated but also the influence of the capacitance and inductance throughout the system is suppressed.
However, the conventional semiconductor device
100
has a drawback that electrode terminals cannot be formed on the surfaces of the chips
102
and
104
in the portion for bonding the chips to each other, so that the chip
104
must have a portion on which electrode terminals are disposed in the surface bonded to the chip
102
for bonding the conductor wires
110
.
Furthermore, to mount a chip capacitor or other passive element on the semiconductor chip
104
, an area therefor must be also provided in the surface bonded to the chip
102
.
Therefore, miniaturization of the semiconductor chip
104
has an unavoidable limit.
Moreover, the presence of the substrate
106
makes it difficult to reduce the thickness of the device
100
as a whole.
There is also a drawback that it is difficult to transfer an assembly of the chips
102
and
104
by vacuum adsorption or other usual transfer means and handling in the production process is complicated, because of the presence of the electrode terminals
112
and
114
exposed from the upper surfaces of the chips
102
and
104
.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a semiconductor device having a first electronic part and a second electronic part, the first electronic part being larger than the second electronic part in area and in the number of connection terminal pads including pad form electrode terminals, the first and second electronic parts being disposed one upon the other with respective pad forming surfaces facing each other, and external connection terminals or other connection terminals being bonded to the connection terminal pads, and a process of producing the same, in which the semiconductor device can be easily miniaturized and reduced in thickness.
To achieve the object according to the present invention, there is provided a semiconductor device having a first electronic part and a second electronic part, the first electronic part being larger than the second electronic part in area and in the number of connection terminal pads including pad form electrode terminals, and external connection terminals or other connection terminals being bonded to the connection terminal pads, wherein:
the first and second electronic parts are disposed one upon the other with respective pad forming surfaces facing each other and are electrically connected to each other by flip-chip bonding; and
springy wire-form connection terminals stand on, and are bonded to, the connection terminal pads of the first electronic part other than those electrically connected to the connection terminal pads of the second electronic part.
Because the first and second electronic parts are flip-chip bonded to each other, neither conductor wires nor connection pads therefor are necessary for electrical connection between the two parts, so that the delay of the signal transfer is minimized and so that the first electronic part larger in area need not have a portion on which electrode terminals are disposed in the surface bonded to the second electronic part, for bonding the conductor wires, and therefore, the degree of freedom in designing the electronic parts is increased.
The springy wire-form connection terminals allow the semiconductor device to be directly mounted on, and electrically connected to, a motherboard without an intervening substrate conventionally used, thereby enabling the thickness of the semiconductor device to be reduced.
The springy nature of the wire-form connection terminals also advantageously prevents occurrence of a thermal stress which would otherwise occur because of a difference in thermal expansion coefficient between the semiconductor device and the motherboard, or conventionally between the first electronic part and the substrate.
In a preferred embodiment, the second electronic part includes a semiconductor chip to provide a minimized delay in the signal transfer between the semiconductor chips of the first and second electronic parts.
In another preferred embodiment, the first electronic part is a chip size package having substantially the same size as that of a semiconductor chip mounted thereon and/or the second electronic part is either a bare chip having electrode terminals in a pad form or a chip size package having substantially the same size as that of a semiconductor chip mounted thereon. This further facilitates miniaturization of the semiconductor device.
In another preferred embodiment, the connection terminal pads are electrically connected to electrode terminals of a semiconductor chip through extension wiring formed on an electrode terminal forming surface of the semiconductor chip to allow the connection terminal pads to be disposed entirely over the electrode terminal forming surface.
In another preferred embodiment, the connection terminal pads are composed of two layers of different metals etchable with different etchants to enable the connection terminal pads for external connection to be formed by electrolytic plating and etching.
In another preferred embodiment, the springy wireform connection terminals are composed of a bent wire of gold or other metal having a metal coating plated thereon to provide reinforced springy wire-form connection terminals.
The present invention also advantageously ensures miniaturization and reduction in thickness of the semiconductor device, when the second electronic part is a passive element such as a chip capacitor or a chip resistor having electrode term
Higashi Mitsutoshi
Kobayashi Tsuyoshi
Koike Hiroko
Murayama Kei
Sakaguchi Hideaki
Fabuml Wael
Pennie & Edmonds LLP
Rao Shrinivas H.
Shinko Electronic Industries Co., Ltd.
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