Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
1999-09-07
2002-09-17
Talbott, David L. (Department: 2827)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S112000, C438S118000, C438S121000, C438S123000, C438S124000, C438S127000, C029S827000, C029S841000
Reexamination Certificate
active
06451627
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates, in general, to a semiconductor device and to a process for manufacturing a semiconductor device and, more specifically, to a semiconductor device and to a process for manufacturing and packaging a semiconductor device that does not require a customized leadframe pre-tailored to a specific device.
A semiconductor device is fabricated by mounting a semiconductor device die in a supportive, protective package. The word “die” will be used herein, in conformance with usual semiconductor industry usage, to include both the singular and the plural. The package serves a number of different functions including providing physical protection for the device and providing electrical access or connection to the semiconductor device die. In a conventional process the semiconductor device die is mounted on a prefabricated leadframe. After forming electrical connections between the device die and the leadframe leads, the die and its associated leads are encapsulated in a molded plastic housing. Such a conventional process for packaging a semiconductor device die has a number of disadvantages or drawbacks. Foremost among the disadvantages is the high cost of the packaging which results, in part, from the fact that each different device type may require a different leadframe. This is especially true for those applications in which the customer requires a custom lead configuration. The leadframe upon which the semiconductor device die is mounted is usually stamped from a sheet of metal and is then plated with gold or other metals that help to insure solderability. Each different leadframe configuration requires an expensive stamping tool which has the disadvantages of being very high in cost and requiring long lead times.
Conventional semiconductor packages are also relatively large in size. This is true even of miniaturized packages such as the TSSOP (Thin, Shrink, Small Outline Package). The large packages, besides consuming large amounts of valuable space within today's miniaturized electronic equipment, contribute high package inductance that impairs RF performance because of the relatively long package leads. In addition, many of the present day packages have poor thermal characteristics so that a packaged device is not able to adequately dissipate large amounts of heat generated during device operation.
In view of the foregoing problems with conventional packaging, a need exists for a process for manufacturing a packaged device that is small, does not require unique leadframes, provides good heat dissipation, has low lead inductance, is inexpensive, and is capable of short turnaround times to accommodate new designs.
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Chambliss Alonzo
Motorola Inc.
Rennie William Dover
Talbott David L.
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