Semiconductor device and power supply controller for same

Details Semiconductor device and power supply controller for same Semiconductor device and power supply controller for same

1996-09-09

1998-03-10

Hecker, Stuart N.

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

327537, 365156, G05F 304

Patent

active

057265623

ABSTRACT:
A semiconductor device includes a first power supply line of a high potential, a second power supply line of a low potential, a third power supply line which is alternatively set to a potential equal to that of the first power supply line or to a potential lower than that of the first power supply line by some degree, and a fourth power supply line which is alternatively set to a potential equal to that of the second power supply line or to a potential higher than that of the second power supply line by some degree. A substrate bias terminal of each of pMOS transistors included in a static memory cell is connected to the first power supply line, and a source of each pMOS transistor is connected to the third power supply line. A substrate bias terminal of each of nMOS transistors included in a static memory cell is connected to the second power supply line, and a source of each pMOS transistor is connected to the fourth power supply line. In an operating condition, the third and fourth power supply lines are brought to the same potential as that of the first and second power supply lines, respectively. In a standby condition, the third and fourth power supply lines are brought to a potential lower and higher than that of the first and second power supply lines, respectively.

REFERENCES:
patent: 5046052 (1991-09-01), Miyaji et al.
patent: 5357416 (1994-10-01), Kitano et al.
patent: 5523966 (1996-06-01), Idei et al.
patent: 5565811 (1996-10-01), Park et al.
patent: 5592423 (1997-01-01), Tokami
patent: 5600588 (1997-02-01), Kawashima
"Static-Noise Margin Analysis of MOS SRAM Cells" Evert Seevinck et al., IEEE Journal of Solid-State Circuits, vol. SC-22, No. 5, Oct. 1987.

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