Static information storage and retrieval – Hardware for storage elements
Reexamination Certificate
1996-11-21
2002-01-29
Zarabian, A. (Department: 2824)
Static information storage and retrieval
Hardware for storage elements
C365S063000
Reexamination Certificate
active
06343030
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor devices and systems using semiconductor devices, and particularly relates to a pin arrangement of semiconductor devices and a pin arrangement of systems using semiconductor devices.
2. Description of the Related Art
While semiconductor chips implementing semiconductor circuits are required to meet a demand for cost cuts, operations of and data transmission between semiconductor devices are expected to have increasing speed. To achieve a speed increase in data transmission, buses connecting between semiconductor devices need to conduct data transfer using higher frequencies for signal transmission.
Pin arrangements of traditional semiconductor devices include an arrangement providing an array of pins at equal intervals on one side of a rectangular chip, an arrangement providing such an array on each of two opposing sides of a rectangular chip, an arrangement furnishing such an array on each of the four sides of a rectangular chip, and an arrangement placing pins beneath a lower surface of a rectangular chip.
The arrangement providing pins on only one side of a rectangular chip has a limitation on the number of pins which can be arranged on the side, thereby restricting the number of pins per unit area on a chip board. The arrangement providing a pin array on two or more sides of a rectangular chip or the arrangement furnishing pins beneath the chip lower surface have a problem in that layouts of various signal lines becomes complicated when a plurality of these chips are arranged and connected with each other. In this case, a large number of wiring layers are needed for signal-line layout, and a number of branches become larger.
When wiring patterns become more complex and branches increase in number, reflections of signals propagating through wires become significant, thereby adversely affecting signal transmission using high frequencies. Namely, high-speed data transfer is undermined. Further, increases in the number of wiring layers and complexity of wiring patterns leads to a hike in the cost of the semiconductor devices.
Accordingly, there is a need for a technique which can simplify wiring patterns on a board with semiconductor devices implemented thereon.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a technique which can satisfy the need described above.
It is another and more specific object of the present invention to provide a technique which can simplify wiring patterns on a board with semiconductor devices implemented thereon.
In order to achieve the above objects according to the present invention, a semiconductor device connected to at least one semiconductor device of the same type includes first pins, provided on a first side of the semiconductor device, for receiving signals commonly used with the at least one semiconductor device, and second pins, provided on a second side of the semiconductor device substantially perpendicular to the first side, for being connected to signal lines which are not connected to the at least one semiconductor device.
Since the semiconductor device described above has the first pins used for common signals on the first side and the second pins used for unshared signals on the second side perpendicular to the first side, a plurality of such semiconductor devices can be arranged in a straight line, and signal lines for transferring the common signals can be laid out straight along said straight line without having branches and with no space conflict with other signal lines used for the unshared signals. This configuration can simplify wiring patterns on a board with these semiconductor devices implemented thereon.
Further, in order to achieve the above objects according to the present invention, a device includes a board, first signal lines provided on the board to extend straight in a first direction, semiconductor packages connected to the first signal lines to share the first signal lines, and second signal lines provided on the board to extend in a second direction substantially perpendicular to the first direction, the second signal lines being provided separately for each of the semiconductor packages, wherein each of the semiconductor packages includes first pins provided on a first side of each of the semiconductor packages and connected to the first signal lines, and second pins provided on a second side of each of the semiconductor packages substantially perpendicular to the first side and connected to the second signal lines.
The device described above has a configuration which allows the first signal lines for transferring the common signals to extend straight without having branches and with no space conflict with the second signal lines used for the unshared signals. This configuration can simplify wiring patterns on the board on which these semiconductor devices are implemented.
Further, a device according to the present invention includes a first board, first signal lines provided on the first board, and a plurality of semiconductor devices mounted on the first board, wherein each of the semiconductor devices includes a second board, second signal lines provided on the second board to extend straight in a first direction, semiconductor packages connected to the second signal lines to share the second signal lines, third signal lines provided on the second board to extend in a second direction substantially perpendicular to the first direction, the third signal lines being provided separately for each of the semiconductor packages, and node portions provided at an end of the second signal lines and the third signal lines and arranged in a line on one side of the second board to be connected to the first signal lines, wherein each of the semiconductor packages includes first pins provided on a first side of each of the semiconductor packages and connected to the second signal lines, and second pins provided on a second side of each of the semiconductor packages substantially perpendicular to the first side and connected to the third signal lines.
The device describe above has a configuration which allows the mounting of a SIMM (or a DIMM) on another board so as to built a memory device of a large scale using a small number of wiring layers and a simple wiring layout. Since there is no branch stemming from the signal lines, signal reflections can be avoided to achieve high-speed data transmission using high-frequency signals in the large-scale memory device.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.
REFERENCES:
patent: 4586162 (1986-04-01), Murai
patent: 5319591 (1994-06-01), Takeda
patent: 5331591 (1994-07-01), Clifton
patent: 5513076 (1996-04-01), Werther
patent: 5557564 (1996-09-01), Haraguchi
patent: 5572457 (1996-11-01), Michael
Higuchi Tsuyoshi
Okajima Yoshinori
Arent Fox Kintner & Plotkin & Kahn, PLLC
Fujitsu Limited
Zarabian A.
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