Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate
2002-11-15
2004-12-21
Clark, S. V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S784000, C257S723000, C438S111000
Reexamination Certificate
active
06833608
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device and its packaging, specifically to a packaging system for a semiconductor switching device that accommodates a change in an input scheme of control signals of the switching device by changing wire bonding positions while using a same semiconductor chip and a same lead pattern.
2. Description of the Related Art
Switching elements for high frequency signals have been a focus of development in many application areas including mobile communication equipment that utilizes microwaves in GHz frequency range and alternates antennas and receiving/transmitting signals. Such a device is described, for example, in Japanese Laid Open Patent Publication No. Hei 9-181642. This type of device often includes a field effect transistor (FET) functioning as a high frequency switch, which is made of a gallium arsenide (GaAs) material, and is integrated as a monolithic microwave integrated circuit (MMIC) having the high frequency switches.
FIG. 1A
is a plan view of a conventional packaging of a semiconductor switching device
63
, and
FIG. 1B
is a schematic cross-sectional view of the packaging of
FIG. 1A
cut along line B—B. The chip
63
is made of GaAs, and has an electrode pad I for receiving an input signal, two electrode pads C
1
, C
2
for a pair of control signals and two electrode pads O
1
, O
2
for emitting an output signal. The input electrode pad I is located between the two input electrode pads C
1
, C
2
. The chip
63
is mounted on an island
62
e
using a conducting paste
70
, such as a solder. The electrode pads on the top surface of the chip
63
are connected to respective leads of a lead pattern
62
by bonding wires
64
. Namely, the control electrode pad C
1
is connected to a lead
62
a
, the input electrode pad I is connected to a lead
62
b
, the control electrode pad C
2
is connected to a lead
62
c
, and the two output electrode pads O
1
, O
2
are connected to leads
62
d
,
62
f
, respectively. The island
62
e
of the lead pattern
62
, which is electrically connected to the chip
63
, is connected to a ground voltage (reference voltage). A resin body
75
covers the chip
63
and the central portion of the lead pattern
62
. The far ends of the leads extend from the side of the resin body
75
. The lead pattern
62
is formed by a conventional stamping process.
The semiconductor switching device
63
has two switches (not shown in the figure), and each switch receives a control signal through the corresponding control electrode pad C
1
, C
2
, i.e., C
1
is for a first switch and C
2
is for a second switch, respectively. Such a switch is typically made of a field effect transistor (FET). A pair of control signals, for example signals A and B (not shown in the figure), which complement each other, is inputted to the two control electrode pads C
1
, C
2
, and then applied to the two switches of the device through the control electrode pads C
1
, C
2
. In one design, for example, signal A is applied to the first switch of the device through the control electrode pad C
1
, and signal B is applied to the second switch of the device through the control electrode pad C
2
. The chip
63
is manufactured to meet this specification so that the two control electrode pads C
1
, C
2
are located close to their corresponding switches. This design is referred to as a normal control switch and is schematically shown in FIG.
2
. However, in another design of the device, it may be required that signal A be applied to the second switch and signal B be applied to the first switch. This is referred to as a reverse control switch and is schematically shown in FIG.
3
. In this reverse design, additional wiring is required to reverse the signal inputs as shown in FIG.
3
. Accordingly, two different device manufacturing processes must be established for the two different device designs.
SUMMARY OF THE INVENTION
The invention provides a semiconductor device including an insulating substrate, a plurality of leads disposed on the substrate, and a semiconductor chip mounted on the insulating substrate and having a plurality of electrode pads disposed on its surface. The electrode pads are connected to the respective leads. The semiconductor chip is disposed with respect to two of the leads to leave areas of each of the two leads not covered by the semiconductor chip at each end of the semiconductor chip. The areas of the two leads are large enough for connecting corresponding leads to the corresponding electrode pads. A first of the two leads is connected to a first of the two electrode pads and a second of the two leads is connected to a second of the two electrode pads when the device is configured so that first of the two electrode pads receives a first signal and the second of the two electrode pads receives a second signal. The first of the two leads is connected to the second of the two electrode pads and the second of the two leads is connected to the first of the two electrode pads when the device is configured so that the first of the two electrode pads receives the second signal and the second of the two electrode pads receives the first signal.
The invention also provides a semiconductor device including a resin body, a plurality of leads embedded in the resin body, and a semiconductor chip embedded in the resin body and having a plurality of electrode pads disposed on its surface. The electrodes pads are connected to the respective leads. The semiconductor chip is disposed with respect to two of the leads to leave areas of each of the two leads uncovered by the semiconductor chip at the ends of the semiconductor chip. The areas of the two leads are large enough for connecting the two leads to the corresponding electrode pads. A first of the two leads is connected to a first of the two electrode pads and a second of the two leads is connected to a second of the electrode pads when the semiconductor device is configured so that the first of the two electrode pads receives a first signal and the second of the two electrode pads receives a second signal. The first of the two leads is connected to the second of the two electrode pads and the second of the two leads is connected to the first of the two electrode pads when the semiconductor device is configured so that the first of the two electrode pads receives the second signal and the second of the two electrode pads receives the first signal.
The invention further provides a device packaging system including an insulating substrate, a first lead disposed on the insulating substrate, a second lead disposed on the insulating substrate, and a surface mounted element mounted on the first and second leads so that at least a portion of each of the leads is left uncovered by the surface mounted element at both ends of the surface mounted element.
The invention also provides a device packaging system including a resin body, a first lead embedded in the resin body, a second lead embedded in the resin body, and a surface mounted element mounted on the first and second leads so that at least a portion of each of the leads is left uncovered by the surface mounted element at both ends of the surface mounted element.
The invention further provides a method of fabricating devices with different internal wirings. This method includes providing lead wiring means for allowing alternative wire bonding configurations, which have a first lead and a second lead, and mounting a surface mounted element on the lead wiring means, which has a first electrode pad and a second electrode pad. The method also includes connecting the first electrode pad to the first lead by a first bonding wire and connecting the second electrode pad to the second lead by a second bonding wire so that the first and second bonding wires do not intersect each other when a device of a first wiring configuration is fabricated, and connecting the first electrode pad to the second lead by the first bonding wire and connecting the second electrode pad to the first lead by the sec
Asano Tetsuro
Inotsume Hideyuki
Kimura Shigeo
Sakai Haruhiko
Sakakibara Mikito
Clark S. V.
Morrison & Foerster / LLP
Sanyo Electric Co,. Ltd.
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